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Verification - FPGA Blog
Current list of bloggers:
Christopher Felton | Evgeni Stavinov | Martin Strubel | muhammad yasir | Stephane Boucher
Christopher Felton | Evgeni Stavinov | Martin Strubel | muhammad yasir | Stephane Boucher
MyHDL Tutorial I (LED Strobe)
Introduction Have you seen the latest FPGA offerings from 'X' and 'A'. These latest devices are huge! Even the devices that one can get for sub $10 are relatively large. Because...
posted by Christopher Felton on Jan 31 2012 under Xilinx | Altera | HDLs | Tips and Tricks | Verification | Basics | Tutorials
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Developing FPGA-DSP IP with Python
This blog post was previously titled MyHDL ASIC Proven (How is this related to FPGAs?) but the blog post has been updated and mainly discusses developing FPGA-DSP IP with Python / MyHDL. The origi... posted by Christopher Felton on Mar 16 2010 under HDLs | HowTos | DSP | Verification | Tools & Simulation | Design Methodologies | Tutorials
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Using GHDL for interactive simulation under Linux
The opensource and free VHDL simulator 'GHDL' has been out for many years, but like many other opensource tools, it has caught limited attention from the industry. I can hear you thinking: 'If it does... 
posted by Martin Strubel on Oct 24 2011 under Verification | Debug | Tools & Simulation | Tutorials
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