Sign in

username:

password:



Not a member?

Search blogs



Search tips

Articles by category



Ads

Our Bloggers

See Also

DSPEmbedded SystemsElectronics

Christopher Felton's FPGA Blog

Christopher Felton
Christopher Felton received a B.S.E.C.E from the University of Minnesota, Duluth in 2000 and an M.S.E.E. degree from the University of Colorado, Colorado Springs in 2005. He works as a DSP and HDL design engineer. One of Christopher's current favorite activities is implementing DSP digital circuits with MyHDL. More information @ LinkedIn.

Page 1 of 1 Sorted by



Grandiose Delusions

Recently on the MyHDL mailing-list there have been discussions about some other immature Python/HDL tools.  In these discussion it was mentioned, how over the years, there has not been a strong...


posted by Christopher Felton on May 3 2012 under
Comments (0) |

MyHDL Tutorial I (LED Strobe)

Introduction Have you seen the latest FPGA offerings from 'X' and 'A'.  These latest devices are huge!  Even the devices that one can get for sub $10 are relatively large.  Because...


posted by Christopher Felton on Jan 31 2012 under Xilinx | Altera | HDLs | Tips and Tricks | Verification | Basics | Tutorials 
Comments (0) |

USB-FPGA : Introduction

This blog is an introduction to a series of blogs I hope to write.  The blogs will cover the design and experiences I had on a project that spanned the last 6 years.  The project was the dev...


posted by Christopher Felton on Jan 12 2011 under Xilinx | Basics | IP / Cores 
Comments (0) |

A Bit Bucket had Holes

Couple months ago I wrote a quick little blog about a company called Tabula.  Tabula has a virtual 3D approach to achieving higher logic density in an FPGA.  See the previous blog for m...


posted by Christopher Felton on Jul 28 2010 under Xilinx | Altera | Other Vendors 
Comments (0) |

Developing FPGA-DSP IP with Python

This blog post was previously titled MyHDL ASIC Proven (How is this related to FPGAs?) but the blog post has been updated and mainly discusses developing FPGA-DSP IP with Python / MyHDL. The origi...


posted by Christopher Felton on Mar 16 2010 under HDLs | HowTos | DSP | Verification | Tools & Simulation | Design Methodologies | Tutorials 
Comments (1) |

Holy Bit Bucket

Was my first response after reading some of the recent news on Tabula.  If you Google "Tabula FPGA" you will find a link to the company and a bunch of recent articles.  The company...


posted by Christopher Felton on Mar 3 2010 under
Comments (0) |

The Spartans

The latest release of the Xilinx Spartan family is the Spartan6 line of FPGAs. It has been awhile since the last major Spartan released, the Spartan3, but this last year Xilinx released the Spartan6. ...


posted by Christopher Felton on Feb 20 2010 under Xilinx 
Comments (3) |