Comp.Arch.FPGA

Comparing FPGA with ASIC implementations
by Marcus sent on 11:3- -0-10-20
Hi all, I just wanna get some feedback if I understood this correctly: Althoug there is someth... 

Tier Logic introduces the world's first 3D FPGA
by Tier Logic sent on 11:3- -0-10-20
The world's first 3D FPGA has arrived! We have a very compelling and cost effective solution. Co... 

Compiling a design in Quartus that doesn't fit
by General Schvantzkoph sent on 11:3- -0-10-20
I want to be able to generate an encrypted netlist of a core using Quartus. Does Quartus have a sw...