Reply by martinjpearson August 24, 20152015-08-24
On Sunday, 23 August 2015 08:50:13 UTC+1, HT-Lab  wrote:
> On 22/08/2015 23:14, martinjpearson wrote: > > On Friday, 21 August 2015 18:36:59 UTC+1, ahmed...@gmail.com wrote: > >> On Tuesday, March 17, 2015 at 4:58:39 AM UTC+3, princesse91 wrote: > >>> Hi Ahmed, > >>> Can you tell me how did you generate VHDL from Handel-C?? I'm working on the conversion from c++ to vhdl with handel-c but i didn't know how to do it.. > >>> Thanks > >> > >> It's very easy use interfaces for inputs and outputs in your Handel-C code. Then change the debug option into VHDL or Verilog or EDIF or SystemC. Be sure to use Mentor Graghics DK Design Suite 5. > > > > do you still have access to Mentor Graphics DK Design Suite 5? I thought this was now obsolete > > > I think DK is not (yet) obsolete but barely alive, the latest version is > 5.4_1 released back in 2011. Nowadays anybody interested in > C/C++/SystemC synthesis will have a wide choice from free to CatapultC. > > Hans > www.ht-lab.com
Our site licence has now expired and Mentor will not renew it. Anyone have any experience of Impulse C? I'm drawn to the CSP based architecture
Reply by HT-Lab August 23, 20152015-08-23
On 22/08/2015 23:14, martinjpearson wrote:
> On Friday, 21 August 2015 18:36:59 UTC+1, ahmed...@gmail.com wrote: >> On Tuesday, March 17, 2015 at 4:58:39 AM UTC+3, princesse91 wrote: >>> Hi Ahmed, >>> Can you tell me how did you generate VHDL from Handel-C?? I'm working on the conversion from c++ to vhdl with handel-c but i didn't know how to do it.. >>> Thanks >> >> It's very easy use interfaces for inputs and outputs in your Handel-C code. Then change the debug option into VHDL or Verilog or EDIF or SystemC. Be sure to use Mentor Graghics DK Design Suite 5. > > do you still have access to Mentor Graphics DK Design Suite 5? I thought this was now obsolete >
I think DK is not (yet) obsolete but barely alive, the latest version is 5.4_1 released back in 2011. Nowadays anybody interested in C/C++/SystemC synthesis will have a wide choice from free to CatapultC. Hans www.ht-lab.com
Reply by martinjpearson August 22, 20152015-08-22
On Friday, 21 August 2015 18:36:59 UTC+1, ahmed...@gmail.com  wrote:
> On Tuesday, March 17, 2015 at 4:58:39 AM UTC+3, princesse91 wrote: > > Hi Ahmed, > > Can you tell me how did you generate VHDL from Handel-C?? I'm working on the conversion from c++ to vhdl with handel-c but i didn't know how to do it.. > > Thanks > > It's very easy use interfaces for inputs and outputs in your Handel-C code. Then change the debug option into VHDL or Verilog or EDIF or SystemC. Be sure to use Mentor Graghics DK Design Suite 5.
do you still have access to Mentor Graphics DK Design Suite 5? I thought this was now obsolete
Reply by August 21, 20152015-08-21
On Tuesday, March 17, 2015 at 4:58:39 AM UTC+3, princesse91 wrote:
> Hi Ahmed, > Can you tell me how did you generate VHDL from Handel-C?? I'm working on the conversion from c++ to vhdl with handel-c but i didn't know how to do it.. > Thanks
It's very easy use interfaces for inputs and outputs in your Handel-C code. Then change the debug option into VHDL or Verilog or EDIF or SystemC. Be sure to use Mentor Graghics DK Design Suite 5.
Reply by princesse91 March 16, 20152015-03-16
Hi Ahmed,
Can you tell me how did you generate VHDL from Handel-C?? I'm working on the conversion from c++ to vhdl with handel-c but i didn't know how to do it..
Thanks


Reply by HT-Lab October 18, 20142014-10-18
On 17/10/2014 23:48, Ahmed Ablak wrote:
> When I generate VHDL from Handel-C. I always end up with an empty VHDL file, did any one face this problem? > and how to solve it? > Thanks >
Hi Ahmed, There is not much info to go on. I assume you are using Handel-c because of some existing (Celoxica) hardware? If you are just after C synthesis then I would suggest you look at Hercules, Xilinx HLS, synflow etc or swap to a more traditional RTL languages. Do any of the demo files work? There is a simple led toggle example in the ./examples/pal/led directory. Good luck, Hans www.ht-lab.com
Reply by Ahmed Ablak October 17, 20142014-10-17
When I generate VHDL from Handel-C. I always end up with an empty VHDL file, did any one face this problem? 
and how to solve it? 
Thanks