Is there synthesis software out there that'll take Verilog or other HDL and generate a netlist of 7400-series logic? To carry things one step further, if you were seriously contemplating such a thing, of course you'd want the software to understand that chips and boards are of finite sizes, that propagation delays between chips and boards exist, and that board-board connections have finite numbers of pins. So -- has it been done, perhaps by someone with way too much time on their hands? How big is an ARM M1 core when it's implemented in discrete logic chips that are currently available in the DigiKey catalog? And how fast? -- www.wescottdesign.com
Fully preposterous gate arranger
Started by ●January 18, 2016
Reply by ●January 19, 20162016-01-19
On 01/18/2016 07:37 PM, Tim Wescott wrote:> Is there synthesis software out there that'll take Verilog or other HDL > and generate a netlist of 7400-series logic?Interesting idea, but moving in the opposite direction of progress (grin). You could probably make a technology library for a standard synthesis package, but handling the multiple gates/package might be a problem.> > So -- has it been done, perhaps by someone with way too much time on > their hands? How big is an ARM M1 core when it's implemented in discrete > logic chips that are currently available in the DigiKey catalog? And how > fast? >It would probably be about the size of a PDP11-34 and run at 10MHz instead of 50MHz, but this is very much a WAG. BobH
Reply by ●January 20, 20162016-01-20
Tim Wescott wrote:> Is there synthesis software out there that'll take Verilog or other HDL > and generate a netlist of 7400-series logic? > > To carry things one step further, if you were seriously contemplating > such a thing, of course you'd want the software to understand that chips > and boards are of finite sizes, that propagation delays between chips and > boards exist, and that board-board connections have finite numbers of > pins. > > So -- has it been done, perhaps by someone with way too much time on > their hands? How big is an ARM M1 core when it's implemented in discrete > logic chips that are currently available in the DigiKey catalog? And how > fast? >Xilinx tools allow you to design at schematic level with 74xx type parts, and then compile to logic equations. So, what you want is the inverse of that process! Jon
Reply by ●January 20, 20162016-01-20
On Tue, 19 Jan 2016 17:24:53 -0700, BobH wrote:> On 01/18/2016 07:37 PM, Tim Wescott wrote: >> Is there synthesis software out there that'll take Verilog or other HDL >> and generate a netlist of 7400-series logic? > > Interesting idea, but moving in the opposite direction of progress > (grin).Well, that's the point! Next, I'll ask that it generates schematics using vacuum tube logic.> You could probably make a technology library for a standard > synthesis package, but handling the multiple gates/package might be a > problem. > > >> So -- has it been done, perhaps by someone with way too much time on >> their hands? How big is an ARM M1 core when it's implemented in >> discrete logic chips that are currently available in the DigiKey >> catalog? And how fast? >> > It would probably be about the size of a PDP11-34 and run at 10MHz > instead of 50MHz, but this is very much a WAG.I think it'd be fun. A Cosmac 1802 equivalent might be easier, though. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
Reply by ●January 20, 20162016-01-20
On 1/20/2016 3:09 PM, Tim Wescott wrote:> On Tue, 19 Jan 2016 17:24:53 -0700, BobH wrote: > >> On 01/18/2016 07:37 PM, Tim Wescott wrote: >>> Is there synthesis software out there that'll take Verilog or other HDL >>> and generate a netlist of 7400-series logic? >> >> Interesting idea, but moving in the opposite direction of progress >> (grin). > > Well, that's the point! Next, I'll ask that it generates schematics > using vacuum tube logic. > >> You could probably make a technology library for a standard >> synthesis package, but handling the multiple gates/package might be a >> problem. >> >> >>> So -- has it been done, perhaps by someone with way too much time on >>> their hands? How big is an ARM M1 core when it's implemented in >>> discrete logic chips that are currently available in the DigiKey >>> catalog? And how fast? >>> >> It would probably be about the size of a PDP11-34 and run at 10MHz >> instead of 50MHz, but this is very much a WAG. > > I think it'd be fun. A Cosmac 1802 equivalent might be easier, though.How about doing logic using neon bulbs? I've considered doing a hardwired sudoku solver using discrete logic with neons. The final stage would be the readout. lol I don't want my whole living room to become a lab though. -- Rick
Reply by ●January 20, 20162016-01-20
On Wed, 20 Jan 2016 17:16:40 -0500, rickman wrote:> On 1/20/2016 3:09 PM, Tim Wescott wrote: >> On Tue, 19 Jan 2016 17:24:53 -0700, BobH wrote: >> >>> On 01/18/2016 07:37 PM, Tim Wescott wrote: >>>> Is there synthesis software out there that'll take Verilog or other >>>> HDL and generate a netlist of 7400-series logic? >>> >>> Interesting idea, but moving in the opposite direction of progress >>> (grin). >> >> Well, that's the point! Next, I'll ask that it generates schematics >> using vacuum tube logic. >> >>> You could probably make a technology library for a standard synthesis >>> package, but handling the multiple gates/package might be a problem. >>> >>> >>>> So -- has it been done, perhaps by someone with way too much time on >>>> their hands? How big is an ARM M1 core when it's implemented in >>>> discrete logic chips that are currently available in the DigiKey >>>> catalog? And how fast? >>>> >>> It would probably be about the size of a PDP11-34 and run at 10MHz >>> instead of 50MHz, but this is very much a WAG. >> >> I think it'd be fun. A Cosmac 1802 equivalent might be easier, though. > > How about doing logic using neon bulbs? I've considered doing a > hardwired sudoku solver using discrete logic with neons. The final > stage would be the readout. lol I don't want my whole living room to > become a lab though.Have you seen the original gas emission counting tubes? They had this arrangement where you'd trigger a clock wire which would make the glow jump from position 0 to position 1, etc. You could sense which pin had the glow and use it for carry, etc. Apparently there were commercially viable computers that used these things, and carried out addition by counting up the accumulator while counting the addend down to zero. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
Reply by ●January 20, 20162016-01-20
On 20/01/2016 19:59, Jon Elson wrote:> Tim Wescott wrote: > >> Is there synthesis software out there that'll take Verilog or other HDL >> and generate a netlist of 7400-series logic? >> >> To carry things one step further, if you were seriously contemplating >> such a thing, of course you'd want the software to understand that chips >> and boards are of finite sizes, that propagation delays between chips and >> boards exist, and that board-board connections have finite numbers of >> pins. >> >> So -- has it been done, perhaps by someone with way too much time on >> their hands? How big is an ARM M1 core when it's implemented in discrete >> logic chips that are currently available in the DigiKey catalog? And how >> fast? >> > Xilinx tools allow you to design at schematic level with 74xx type parts, > and then compile to logic equations. So, what you want is the inverse of > that process!The reverse also works, so you can look at the generated RTL after inputting VHDL or Verilog but its mapping to the gates in the target chip, not discrete TTL. It also produce an IBIS Netlist... I suspect it may be possible to adapt one of the open source synthesis tools to generate TTL Netlists..> > Jon >Dave
Reply by ●January 21, 20162016-01-21
On 21/01/16 00:22, David Wade wrote:> On 20/01/2016 19:59, Jon Elson wrote:<snip>> > I suspect it may be possible to adapt one of the open source synthesis > tools to generate TTL Netlists..Could you share your experience with open-source synthesis tools? I would be glad to have an overview on what is available and how it performs in practice! Pere> >> >> Jon >> > > Dave >
Reply by ●January 21, 20162016-01-21
On Wed, 20 Jan 2016 16:42:30 -0600, Tim Wescott wrote:> On Wed, 20 Jan 2016 17:16:40 -0500, rickman wrote: > >> On 1/20/2016 3:09 PM, Tim Wescott wrote: >>> On Tue, 19 Jan 2016 17:24:53 -0700, BobH wrote: >>> >>>> On 01/18/2016 07:37 PM, Tim Wescott wrote: >>>>> Is there synthesis software out there that'll take Verilog or other >>>>> HDL and generate a netlist of 7400-series logic? >>>> >>>> Interesting idea, but moving in the opposite direction of progress >>>> (grin). >>> >>> Well, that's the point! Next, I'll ask that it generates schematics >>> using vacuum tube logic. >>> >>>> You could probably make a technology library for a standard synthesis >>>> package, but handling the multiple gates/package might be a problem. >>>> >>>> >>>>> So -- has it been done, perhaps by someone with way too much time on >>>>> their hands? How big is an ARM M1 core when it's implemented in >>>>> discrete logic chips that are currently available in the DigiKey >>>>> catalog? And how fast? >>>>> >>>> It would probably be about the size of a PDP11-34 and run at 10MHz >>>> instead of 50MHz, but this is very much a WAG. >>> >>> I think it'd be fun. A Cosmac 1802 equivalent might be easier, >>> though. >> >> How about doing logic using neon bulbs? I've considered doing a >> hardwired sudoku solver using discrete logic with neons. The final >> stage would be the readout. lol I don't want my whole living room to >> become a lab though. > > Have you seen the original gas emission counting tubes? They had this > arrangement where you'd trigger a clock wire which would make the glow > jump from position 0 to position 1, etc. You could sense which pin had > the glow and use it for carry, etc. > > Apparently there were commercially viable computers that used these > things, and carried out addition by counting up the accumulator while > counting the addend down to zero.https://en.wikipedia.org/wiki/Dekatron https://en.wikipedia.org/wiki/Harwell_computer -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
Reply by ●January 21, 20162016-01-21
BobH <wanderingmetalhead.nospam.please@yahoo.com> wrote:> Interesting idea, but moving in the opposite direction of progress > (grin). You could probably make a technology library for a standard > synthesis package, but handling the multiple gates/package might be a > problem.I don't think it would be so bad. I assume that many standard cells would have multiple outputs (eg Q and /Q) so presumably you could write a description that a 7400 takes 8 input variables and outputs 4 output variables - that an output doesn't depend on all the inputs isn't exactly unusual. Who knows how well it would do placement based on that description, but that's usual tools voodoo. My guess would be this would work better with a tool like Synopsys Design Compiler (intended for standard cell gates) rather than an FPGA tool (that thinks about LUTs), but use whatever you have really. Presumably you could use an ASIC design flow with appropriate design rules (set your ASIC technology to match your PCB layer stackup, tell it the spacing rules of your PCB house) and get it to route the PCB for you? Output Gerber instead of GDS-II and send for fab? Hmm, that could be a fun way of teaching how to use the tools... Theo
