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Comp.Arch.FPGA

Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.

There are 17402 threads in our archives.

You are looking at page 15 of 1741.

The threads with the newest articles are listed first.

Bitstream compression [16 articles]

Rob Gaddi - 2011-08-27 19:12:00
Hey all-- So my experience with the native bitstream compression algorithms provided by the FPGA vendors has been that they don't actually achieve all that much compression. This makes sense g...Bitstream compression

ISE and detecting flowthrus [3 articles]

fpga_me - 2011-08-26 23:16:00
Hi All, When doing multi-FPGA designs, what are some of the techniques that you use to detect if you have mistakenly pin multiplexed a flowthru net? I am specifically interested in the way which IS...ISE and detecting flowthrus

extracting D from 1 / D*D [14 articles]

Bert_Paris - 2011-08-26 03:41:00
Hi Folks, Incredibly busy summer here, so before burning my brain cells, Googling or -worst- digging in my very dusty math courses, I submit this question to the DSP experts who usually float aro...extracting D from 1 / D*D

The smallest EDA tool

Guosheng Wu - 2011-08-25 19:33:00
Robei is the world smallest EDA tool (less than 5Mbits) for Verilog based EDA software. It integrates modern graphical user interface and a tiny cross platform Verilog simulator. The biggest advanta...The smallest EDA tool

meta assembler

dscolson@rcn.com - 2011-08-25 17:22:00
Are there any commercially available meta assemblers like metalasm for programmable state machines in FPGAs? Thanks Dave ...meta assembler

Regarding virtex II pro xilinx XC2VP30 FF896 [2 articles]

varun_agr - 2011-08-25 04:55:00
Sir I want to know how much voltage(min and max)to I/O connectors of J5 AND J6 in virtex II pro xilinx XC2VP30 FF896 board , can given. Thanks Varun ---------------------------------...Regarding virtex II pro xilinx XC2VP30 FF896

Running Chipscope >=12.x on Linux.

wzab - 2011-08-24 14:40:00
When I tried to use Chipscope on my Linux machine, I got, the following error: COMMAND: open_cable INFO: Started ChipScope host (localhost:50001) ERROR: Failed to open connection to server local...Running Chipscope >=12.x on Linux.

FPGA based PCIe Gen3 Endpoint question

Test01 - 2011-08-23 14:37:00
I need to use the FPGA as PCIe Gen3 endpoint on one side and SPI ROM interface on the other side. Normally in x86 PC architecture, the southbridge SPI rom interface integrated but I need to elimina...FPGA based PCIe Gen3 Endpoint question

Spartan6 PCB debugging: how badly do you have to screw up for JTAG to not shift? [14 articles]

karl schrunk - 2011-08-23 10:48:00
I'm troubleshooting the first rev of my first Spartan 6 PCB design; this is sort of a learn-by-making-all-the-mistakes process, but I could sure use a hint or two here from the gurus. Obviously t...Spartan6 PCB debugging: how badly do you have to screw up for JTAG to not shift?

vhdl:passing generic sized arrays to functions? [6 articles]

Morten Leikvoll - 2011-08-23 09:11:00
Im have different sizes of std_logic_vector arrays and want to run functions on different array types where vector sizes are different (array height is unconstrained). Ive looked at subtypes, bu...vhdl:passing generic sized arrays to functions?
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