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Comp.Arch.FPGA

Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.

There are 17402 threads in our archives.

You are looking at page 17 of 1741.

The threads with the newest articles are listed first.

Xilinx Coregen, command not found java error [6 articles]

Zach Stechly - 2011-08-12 11:43:00
Hi all - I'm running Xilinx ISE 10.1 on a 64-bit linux machine, and I'm getting a weird error. Designs which do not use a coregen generated file compile fine...however, when I try and use corege...Xilinx Coregen, command not found java error

to sell: Nallatech H101-PCIXM PCI-X FPGA Accelerator Card (used) [2 articles]

mexas - 2011-08-11 17:11:00
I'm trying to sell a Nallatech H101-PCIXM card I no longer need: http://cgi.ebay.co.uk/ws/eBayISAPI.dll?ViewItem&item=170680888864 Thanks Anton PS. Apologies if such ads are not allowed on ...to sell: Nallatech H101-PCIXM PCI-X FPGA Accelerator Card (used)

Is there a utility to peek and poke PCIe devices [6 articles]

General Schvantzkoph - 2011-08-11 11:30:00
Is there a utility that does peeks and pokes to PCIe devices. I'm developing an FPGA with a PCIe interface and I'd like to do some simple memory accesses before I move on to the more complicated t...Is there a utility to peek and poke PCIe devices

Newbie PCB [9 articles]

linobi - 2011-08-11 09:42:00
Hi there! I need some advice. I want to make a circuit to drive a VGA monitor. I've done it with the FPGA trainer boards with Xilinx chips, but now I want to design a custom board that host only th...Newbie PCB

Verilog, VHDL, sync and async resets [2 articles]

johnp - 2011-08-10 22:02:00
We need to code some modules in both VHDL and Verilog and would like to use a parameter/generic to control inferring sync or async resets. Is there a clean way to code this that is similar in both...Verilog, VHDL, sync and async resets

ISE bug? [9 articles]

Andrew Holme - 2011-08-10 14:22:00
I'm still using ISE 8.2i. Yes, I know. But it's served me well and I live by the "if it works don't upgrade it principle." "Served me well" until now that is. I may have found a bug. My FPGA ...ISE bug?

QuartusII Ver11.0 programmer problems? [3 articles]

Nial Stewart - 2011-08-10 07:04:00
I have a client who is trying to use the QuartusII Ver 11.0 stand alone programmer to program a Cyclone IV board, and is having problems and his machine isn't seeing the programmer (It's an Entner ...QuartusII Ver11.0 programmer problems?

FPGA [3 articles]

ECS.MSc.SOC - 2011-08-10 03:05:00
Hi all I want to do a project with a FPGA. The FPGA that I choos is ALTERA Cyclone III.I think that there is no analog input in that. Of course, I know that I can use an external ADC(A/D) but I c...FPGA

elf of jpeg code to the microblaze [2 articles]

system85 - 2011-08-08 12:26:00
Hello I want to compile rhe jpeg code for the microblaze processor. So i download the gnu tool for the microblaze ( i follow this http://xilinx.wikidot.com/mb-gnu-tools) I use a ubunto machine to...elf of jpeg  code to the microblaze

RS232 [2 articles]

ECS.MSc.SOC - 2011-08-07 09:29:00
Hi all I am using Altera DE0 Cyclone III board. I am confused about the RS232 connection in DE0 Cyclone II. my question is that: There are some connection in FPGA board related to the RS232....RS232
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