Sign in

username:

password:



Not a member?

Search Comp.Arch.FPGA



Search tips

fpga by Keywords

Altera | ASIC | CPLD | Cyclone | DCM | DDR | DSP | Ethernet | ISE | JTAG | Linux | LVDS | Microblaze | ML310 | Modelsim | NIOS | OPB | PCI | Quartus | RocketIO | SDRAM | Spartan | Spartan3 | SRAM | Stratix | Verilog | VHDL | Virtex | Virtex-4 | Virtex-II | Xilinx | XST

Ads

See Also

DSPEmbedded SystemsElectronics

Comp.Arch.FPGA

Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.

There are 17402 threads in our archives.

You are looking at page 26 of 1741.

The threads with the newest articles are listed first.

Xilinx MicroBlaze 4.00.a source codes released by Xilinx !? [10 articles]

Antti - 2011-05-11 09:43:00
get from Xilinx website http://www.xilinx.com/bvdocs/appnotes/xapp730.zip unzip, then look in /pcores/microblaze_4_00_a/hdl/vhdl that looks like true unscrambled RTL source of the MicroBlaze ...Xilinx MicroBlaze 4.00.a source codes released by Xilinx !?

FPGA cards with memory bus interface

kaa - 2011-05-11 09:43:00
Good day everyone I am fairly new to FPGA based architectures, and I'm interested in applications that are very sensitive to IO bus latency (PCIe or FSB). Can anyone advise of FPGA cards that ca...FPGA cards with memory bus interface

fpga [3 articles]

bashir2000 - 2011-05-10 07:01:00
Hello dear all, I have run into a problem regarding the FPGA. The FPGA output signal amplitude is 3.3, and to drive my switches, I need to increase the voltage up to 15 V. I am using TC4427(dual powe...fpga

Win an Altera DE0-Nano (Cyclone IV Dev Kit)! [5 articles]

allen - 2011-05-09 22:03:00
Hey guys! Terasic Technologies is holding a contest to WIN the newly released Altera DE0-Nano! Head over to http://www.terasic.com.tw/events/DE0_Nano_Contest/ to leave a comment and win one today...Win an Altera DE0-Nano (Cyclone IV Dev Kit)!

USB support for XUPV2P [2 articles]

Manusha - 2011-05-09 13:50:00
Does any one know an add on card that can be used with XUPV2P? ...USB support for XUPV2P

ise 10.1 (Linux) contraints problem [11 articles]

Jon Elson - 2011-05-08 20:55:00
Hello, all, I'm using Xilinx Ise 10.1 on a Linux system, and ran into a crazy problem. I took a previous design and stripped out a bunch of stuff to make a skeleton of that project to test someth...ise 10.1 (Linux) contraints problem

Logic Accessible Clock [2 articles]

valtih1978 - 2011-05-05 21:17:00
The Logic Accessible Clocks are entailed for example in http://www.cisl.columbia.edu/courses/spring-2004/ee4340/restricted_handouts/xapp200.pdf. I do not see much explanation of the concept. But,...Logic Accessible Clock

NULL POINTER DEREFERENCE [2 articles]

rittu - 2011-05-05 12:25:00
Hello all, I am a fresher in this industry..... I am working on systemverilog... I have created a model for analog to digital conversion,I have to make use of an already created model I have made th...NULL POINTER DEREFERENCE

remove Xilinx webtalk [7 articles]

Michael - 2011-05-05 11:35:00
Hi, How do I remove webtalk in Xilinx 13.1, I do run all the tools from a script not from GUI? I did run a trail license at first but now I have a proper flexlm license! /michael ...remove Xilinx webtalk

Raggedstone3 - Altera PCIe Development Board [6 articles]

John Adair - 2011-05-05 10:34:00
If you didn't see it already in our our newsletter we have a new PCIe devopment board based on an Altera Cyclone-IV GX. The new board keeps most of the mechanicals and features of our Raggedstone pr...Raggedstone3 - Altera PCIe Development Board
previous | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | next