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Comp.Arch.FPGA

Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.

There are 17402 threads in our archives.

You are looking at page 27 of 1741.

The threads with the newest articles are listed first.

Lattice Breakout Boards [7 articles]

Gabor - 2011-05-04 14:06:00
I often see people, especially hobbyists looking for inexpensive boards with a lot of non-dedicated I/O. These new boards from Lattice are pretty basic (no on-board RAM) but have a lot of break-ou...Lattice Breakout Boards

Is fixed point (ieee_proposed.fixed_pkg_c) supported by XST for Xilinx DS 12.4 [4 articles]

allsey87 - 2011-05-04 07:58:00
Hi All, I'm interested to know if anyone has successfully synthesised code using the fixed point data types 'sfixed' and 'ufixed' from the package (ieee_proposed.fixed_pkg_c) without any modific...Is fixed point (ieee_proposed.fixed_pkg_c) supported by XST for Xilinx DS 12.4

about slices in xilinx [7 articles]

mary - 2011-05-04 07:57:00
hi all, i have a doubt regarding no.of slices in xlinx what are slices? what are LUT? in xilinx 1)the no.of slice constant in every version or does it vary? 2)can the area of an archit...about slices in xilinx

XC3SD3400A Coprocessor Module [3 articles]

John Adair - 2011-05-03 08:29:00
Also new this week is our XC3SD3400A Coprocessor module. Not surprisingly it is based on a Xilinx Spartan-3A DSP XC3SD3400A FPGA. Module has JTAG, SPI configuration and a 6A core voltage regulator a...XC3SD3400A Coprocessor Module

help with a power pc processor based software [10 articles]

Manusha - 2011-05-03 07:41:00
i have implemented a powerpc based embedded system in a xilinix vertex-2pro device and trying out an extremely simple program. Here is the code. #include "xparameters.h" #include "xbasic_types.h...help with a power pc processor based software

Synplify compile points keep getting resynthesized

null - 2011-04-30 19:41:00
Hi all, For some reason synplify is resynthesizing my compile points even though the compile points' rtl have not changed and compile points' sdc files are the same as the initial compile. Synplify...Synplify compile points keep getting resynthesized

question about vtr

sahar - 2011-04-30 17:53:00
dear all, I want to run scripts in "vtr_relase/reg_test/script". but I could not run them, I don not know how I can pass parameter. is there any one to help me ? thanks, ...question about vtr

Picoblaze C Compiler [2 articles]

Selensky - 2011-04-30 16:25:00
Does anyone have the latest version of PCCOMP written by Francesco Poderico? Google helped me to find the version alpha 1.7.x at http://www.asm.ro/fpga/, but I found some references to version 1....Picoblaze C Compiler

same RTL on two same boards giving different behaviour [17 articles]

salimbaba - 2011-04-30 14:01:00
Hi, I am using spartan3 xc3s4000 custom board in my design interfaced with a national PHY DP83865, xilinx 12.3 for synthesis and implementation and i'm facing a strange problem. I run the same RTL on...same RTL on two same boards giving different behaviour

Anti-benchmarking clauses [8 articles]

Philippe - 2011-04-29 19:55:00
It was interesting to read some synthesis benchmarking results on comp.lang.vhdl last week. I feel it's high time that EDA vendors drop the anti-benchmarking clauses from their license agreements: ...Anti-benchmarking clauses
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