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Comp.Arch.FPGA
Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.
There are 16714 threads in our archives.
You are looking at page 3 of 1672.
The threads with the newest articles are listed first.
problem with using DCM of virtex 4
farhanakram - 2010-08-24 07:39:00
I am using the DCM of the Virtex 4VSX35 to make the 100MHz pulse from the
50MHz but results are not satisfactory instead of having (1010) from the
resultant pulse i am getting (1xx0) can anybody tell ...
TCP Client using lwIP API [2 articles]
micro - 2010-08-23 04:43:00
Hi,
I am really looking for some help in how to write code for my FPGA board
for implementing a TCP Client using lwIP API using the commands like
netconn_connect() and so on. I found some documentati...CE compliance testing [24 articles]
Fredxx - 2010-08-22 04:19:00
I have a small electronic unit which needs some CE compliance testing.
Cost is a major issue and was wondering if anyone here can offer advice on
an affordable solution.
...CPLD development board with 8-bit wide Flash/EEProm [5 articles]
stevem1 - 2010-08-20 17:24:00
I have a custom 8051 RTL core that I want to put into a CPLD
on a development board.
I also need an external Flash/EEProm memory on the same
CPLD development board to run 8051 code from.
Are t...FPGA PCI BOARD .. Few Questions [16 articles]
Sink0 - 2010-08-20 13:10:00
I am designing myself a FPGA board to interact with a PCI Bus and i have
couple questions.
First, Is it mandatory to have 2 power layers (GND + VCC)?
Second, i just got a quote from a PCB manu...SDK example from Xilinx do not compile [7 articles]
Rice - 2010-08-20 05:47:00
Hello, I have been trying to implement the SDK example
(http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/edk_ctt.pdf)
into my Avnet Virtex 5 FXT Eval Kit... but the program gives an e...Analog Video Processing module
maverick - 2010-08-20 04:04:00
Hi,
I am looking for a low cost, small form factor video processing
module. It should have single or dual analog inputs and analog
output(s). A DSP (DaVinci, DM355, Sharc etc) will be required to d...Altera blasters missing ESD protection [3 articles]
Morten Leikvoll - 2010-08-19 11:56:00
Ive seen some different blasters now and they are all missing ESD protection
on the jtag pins. A colleague has blown quite a few now. The jtag signals
only have a small L and then goes direct into...Getting started with FPGA [36 articles]
rupertlssmith@googlemail.com - 2010-08-19 09:29:00
Hi,
I'm interested in learning more about FPGAs in a hands on way. Can
anyone recommend an inexpensive set of tools to get started with? My
wishlist is: I'd like to develop on Linux, I'd like to ...VDHL initializing [14 articles]
hvo - 2010-08-18 22:45:00
Hello,
When initializing input/output signals in a multilevel VHDL design, is it
"better" to initiate the values in the component declaration in the
toplevel? or the submodule entity declaration? ...