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Comp.Arch.FPGA
Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.
There are 17402 threads in our archives.
You are looking at page 30 of 1741.
The threads with the newest articles are listed first.
F.S. Xilinx ML403 evaluation board
mstricker - 2011-04-18 09:14:00
Hi,
I used the ML403 on a couple of projects and no longer have any use
for it.
It comes with the USB programming pod for $175 which includes
shipping.
This is only for sale in the USA.
Than...
GTKWave 3.2.0 for Windows is available [13 articles]
Muzaffer Kal - 2011-04-17 03:25:00
Hi everyone,
the latest version of GTKWave (3.2.0) windows binary is available at
here: http://www.dspia.com/gtkwave.html
-- Muzaffer Kal
DSPIA INC.
ASIC/FPGA Design Services
http://www.dspi...ML505 NOT RECOGNIZED BY THE PC THROUGH PCI EXPRESS [4 articles]
ouadrani - 2011-04-16 17:52:00
I encounted a problem with my PCI-E design with ML505 in the xapp 859 of
xilinx.
The host PC couldn't detect the ML505 and OS can not recognize the card.
My Ise tools' version is 12.1 .
If the ML50...Altium Limited closing up shop - Altium Designer discontinued [18 articles]
Rikard Astrof - 2011-04-15 04:08:00
FYI: Altium limited has laid off 60% of their staff and will be
closing the australia offices by the end of the month.
...Virtex-5 GTP with oversampling [3 articles]
Stebanoid - 2011-04-14 09:42:00
Hello, All.
I want to use a GTP transceiver with oversapling mode on for receiving
a 125Mbit/s signal.
But I don't know, what frequency will be in rxrecclk, if I use 10bit
bus and builtin oversamp...Desperately looking for XC5VFX30T-3FFG665 [4 articles]
Kolja Sulimma - 2011-04-14 04:37:00
Hi,
for our new product we are using the chips in the subject of this
post. The last time we ordered they had 4 weeks leadtime. Therefore we
did not take any special precautions to procure chips....Source of Dynamic Power Consumption in FPGAs [20 articles]
rickman - 2011-04-13 15:22:00
In considering the nature of power consumption in FPGA devices it
occurred to me to ask what components in the FPGA are responsible for
most of the power. The candidates are clock trees, routing, L...Need PCIe Help [4 articles]
Rob Gaddi - 2011-04-13 13:49:00
Hey all --
I've got a client breathing down my neck, asking if there's anything
that can be done to accelerate a design we're doing for them. The one
piece of the design that's really going to...Altera web 10.1sp1
jacko - 2011-04-11 17:14:00
How small is it when installed? Can it be made smaller at the install phase? Just need MAX II and VHDL and maybe cyclone later.
...Controllling reset duration in EDK - plb bus
Benjamin Couillard - 2011-04-11 16:10:00
Hi everyone,
I'm trying to simulate my EDK design that contains a PCI-express block
connected to a PLB bus. In the PCI express block it is mentionned that
"The MPLB_Rst and SPLB_Rst must be asser...