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Comp.Arch.FPGA
Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.
There are 17402 threads in our archives.
You are looking at page 31 of 1741.
The threads with the newest articles are listed first.
TTA-Based Co-design Environment (TCE) v1.4 released
Pekka Jaaskelainen - 2011-04-11 13:15:00
TTA-Based Co-design Environment (TCE) is a toolset for designing
application-specific processors (ASP) based on the Transport Triggered
Architecture (TTA). The toolset provides a complete retargetab...
Do people do this by hand? [9 articles]
Mr.CRC - 2011-04-11 05:36:00
Hi:
I've been developing a DSP+FPGA engine laboratory experiment controller
for some years. This summer I have a EE intern coming to help me with
hardware and logic development to push toward fi...Reference book on Pci-express (Hardware and software point of view) [4 articles]
Benjamin Couillard - 2011-04-11 03:30:00
Hi everyone,
I was wondering if anyone here can suggest me a good reference book on
PCI express design. I've seen a few on amazon but before buying I'd
like to hear your suggestions.
Thanks
...IP Core Delivery Format Info [18 articles]
Jason Luska - 2011-04-09 12:56:00
Hi Guys,
Hope one of you guys can help me out here. I have to supply a client a
IP core that we have developed but we don't want to give the VHDL
source. I have a few questions regarding delivery...Fun with Xilinx Constraints [2 articles]
Rob Gaddi - 2011-04-09 10:49:00
I'm working on a Spartan 3 design and trying to figure out how, if at
all, I can constrain what I'm looking for without resorting to hand
placement and directed routing.
I've got an analog puls...Little help with OC PCI Bridge (again)
Sink0 - 2011-04-08 18:39:00
Hi, i am trying to ake use of OC Pci Bridge on my designe, and finally
i could make it work as i want. I can master the network and receive/
send bursts of data on Linux. But i need a sugestion now....What are the preferred Virtex5/Virtex6 configuration methods? [4 articles]
Rich - 2011-04-07 15:29:00
Hello all,
In a seperate thread, there was a brief discussion on what features
are needed in a evaluation kit. So related to that, I'm wondering
what is the preferred method out there for config...Develop Software or Systems? Receive Guaranteed $10 or have $10 Donated to FIRST; Chance to Win an iPad 2
OnTargetEmbedded - 2011-04-07 12:59:00
VDC is conducting its annual survey of embedded engineers, and if you
are involved in the engineering of mobile or embedded systems/
software, this is your chance to influence key embedded solution
...Help with SDC (specifically edge_shift) [4 articles]
James - 2011-04-06 17:52:00
I want to use create_generated_clock to generate a clock that is half
the frequency of the source clock and also phase shifted by 90
degrees. I'm using Xilinx's new SDC support which does not have ...RocketIO [2 articles]
Ernest Scheiber - 2011-04-06 10:30:00
Hello all,
I am trying to understand whether it is possible to extract a clock
from the serial stream and use it as reference for the PMA PLL.
According to what I read so far it is not customary,...