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Comp.Arch.FPGA


Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.

There are 16333 threads in our archives.

You are looking at page 6 of 1634.

The threads with the newest articles are listed first.

System design in FPGA [17 articles]

jozamm - 2010-02-23 08:47:00
Hi all, I am a budding FPGA designer and I am in the process of designing first system. Until now I have partitioned my system into various entities, each entity implementing a small part of the ...System design in FPGA

Reading UDP with FPGA [10 articles]

Dek - 2010-02-23 01:06:00
Hi all, as the title says I have to read some information stored in UDP packet with an FPGA. Now I'm evaluating 3 options: 1) Use an external processor and send data to FPGA through dedicated ...Reading UDP with FPGA

rocketio TX delay between sata0 and sata1 [14 articles]

msegura - 2010-02-22 21:34:00
Hi, I'm workng with MGT as GT_CUSTOM. I use the MGT for transmiting to pulses of .66ns(1/15Ghg). I check all the delays with FPGA editor and all was ok, but I mesure the pulses at the SATA conector ...rocketio TX delay between sata0 and sata1

Looking for Ultimate RISC/MISC that runs LINUX Website [3 articles]

Derek Simmons - 2010-02-22 19:19:00
I realize what I'm looking for might not be out there anymore but I'm trying to give it my best shot. A couple of years ago I came across a website that somebody put up describing an ultimate RIS...Looking for Ultimate RISC/MISC that runs LINUX Website

Quartus II IDE freezing on Arch 64 [4 articles]

bizarrefish - 2010-02-22 10:06:00
Hello, all. I just got quartus II linux web edition operational on my Arch64 lappy. This involved installing a bunch of libraries, tweaking my /etc/ issue file to correct something that altera was ...Quartus II IDE freezing on Arch 64

how to read bmp file in vhdl [3 articles]

suni - 2010-02-22 06:20:00
helo i am in B.E.-E&TC,doing project on DIGITAL WATER MARKING TECH.. I need to convert matlab code in to vhdl for downloading,if not then how to read bmp file in vhdl?..Can u please help me out.. ...how to read bmp file in vhdl

EDK 11,1 on Windows 7, 32 Bit [8 articles]

Antti - 2010-02-22 05:36:00
Hi my co-worker has a problem with EDK (used on w7, 32bit) OLD project can be built but any new projexcts created stop during implementation xilinx claims that the following table http://www....EDK 11,1 on Windows 7, 32 Bit

State machines in Quartus [3 articles]

Giorgos Tzampanakis - 2010-02-21 15:57:00
I'm trying to get Quartus to recognize my state machines. I'm using version 9.0. I tried generating a state machine using the State Machine Wizard, but after compiling, if I try to look at it wi...State machines in Quartus

BRAM16 error [7 articles]

bh.ines1806@gmail.com - 2010-02-21 07:37:00
Hi all, I have a Spartan 3 Starter Board. I want to make a simple application with microblaze. But when I generate the bitstream an error error has appeared wich is: ERROR:Pack:2310 - Too many com...BRAM16 error

Question about altera root-port for Stratix4GX Hard IP

Test01 - 2010-02-20 21:51:00
I have a question about Altera Stratix4GX PCIe Hard IP root port question. As per my understanding, the back end of the root-port supports Avalon ST Bus thorugh which I can feed TLPs to pass trans...Question about altera root-port for Stratix4GX Hard IP
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