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Comp.Arch.FPGA


Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.

There are 16714 threads in our archives.

You are looking at page 7 of 1672.

The threads with the newest articles are listed first.

Spartan 3E: SPI programming through JTAG [2 articles]

Elder Costa - 2010-07-31 19:28:00
I have an embedded design based on Spartan 3e and I need to be able to update it. Impact is not an option for lack of Xinlinx cables in the field and also because it has become a behemoth since its ...Spartan 3E: SPI programming through JTAG

DSP with sensor i2c interface [3 articles]

Gladys - 2010-07-30 10:50:00
Hi all, I have to interface DSP with 3 image sensor,s there're only two i2c GPIO for DSP, so I need to implement an i2c core in FPGA, I've implemented an i2c slave core to receive data from DSP an...DSP with sensor i2c interface

SDRAM AutoPrecharge and Refresh [4 articles]

siriokds - 2010-07-29 18:12:00
As a newbie I'm working on an SDR SDRAM controller in VHDL and looking at datasheet of the chip I read how to set CAS latency to 2. I'm just using only simple READA/WRITA (with autoprecharge) comman...SDRAM AutoPrecharge and Refresh

Getting started with partial reconfiguration [3 articles]

Richard - 2010-07-29 11:07:00
Hi, I wanna get started to design architectures with partially reconfiguarable modules. I am using a Virtex-5, according to the manual this board now also allows to dyanmically change the clock...Getting started with partial reconfiguration

USB3.0 device detection

anne - 2010-07-29 07:05:00
how does a host know a usb3.0 device get attached?what kind of reset will the host give on detecting the device --------------------------------------- Posted through http://www.FPG...USB3.0 device detection

Overheated FPGA? (Spartan-3E) [2 articles]

JoSa - 2010-07-28 15:26:00
Me and my college are first time users of programming a FPGAs. We have bought the already assembled card Xylo-L from knjn. It has a Spartan-3E FPGA among other parts. Somewhere during the process of h...Overheated FPGA? (Spartan-3E)

Announcing AjarDSP - an open source VLIW DSP [7 articles]

Markus Lavin - 2010-07-28 13:48:00
Hi all, This is a post to announce the existence of the AjarDSP project, an attempt to design and implement an open source VLIW DSP with an open source tool chain (assembler, simulator/debugger a...Announcing AjarDSP - an open source VLIW DSP

problem in loading from flash to spartan-3 xc3s200 [2 articles]

andfn - 2010-07-28 13:44:00
Hello, I'm learning to use FPGA, and i've designed and realized some schematic using spartan-3 xc3s200 (208 pin) and xcf01s, the last following UG332.pdf pag 68. I'm using the xilinx ise 9.2 updat...problem in loading from flash to spartan-3 xc3s200

please help and advice : Error: Pack:1107 - Unable to combine the following symbols into a single IOB component: [2 articles]

Eyyub Can Odacioglu - 2010-07-28 13:29:00
How can I solve this error? ERROR:Pack:1107 - Unable to combine the following symbols into a single IOB component: BUF symbol "TXD_OBUF" (Output Signal = TXD) PAD symbol "TXD" (Pad S...please help and advice : Error: Pack:1107 - Unable to combine the  following symbols into a single IOB    component:

Problems with VHDL lookup table in Quartus [4 articles]

Rhydian - 2010-07-28 07:49:00
Hi, I'm trying to debug a Cyclone design which writes values taken from a lookup table to the address inputs of a crosspoint analog switch. The problem is that everything looks OK in the Quartus...Problems with VHDL lookup table in Quartus
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