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Comp.Arch.FPGA

Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.

There are 17402 threads in our archives.

You are looking at page 8 of 1741.

The threads with the newest articles are listed first.

Xilinx USB II Cable driver under Gentoo Linux [5 articles]

2011-11-03 10:26:00
I'm looking for pointers to an installation guide on how to install the Xilinx USB II Cable driver under Gentoo Linux? I just took a quick look at the installation script(1) and found checks fo...Xilinx USB II Cable driver under Gentoo Linux

CSV pinout from Actel [2 articles]

self - 2011-11-03 06:18:00
Guys, Do you know if it is possible to get a complete pinout report from the Actel compilation flow? I want something complete like the CSV file that comes out of the Xilinx ISE compilation pr...CSV pinout from Actel

Altera FPGA weirdness [29 articles]

John Larkin - 2011-11-01 18:09:00
Hi, We have a new board we just designed, and we're trying to fire up the first one. http://www.panoramio.com/photo/60806547 It has an Altera EP2AGX45DF29C5N on board; says so right on the l...Altera FPGA weirdness

FPGA development [18 articles]

thunder - 2011-10-29 16:50:00
Hello I am very new to FPGA's (background being ASIC design). I would like to map some designs onto FPGA's as a starting point. I want to experiment with the complete FPGA flow, starting with w...FPGA development

Clock Phase Fun on Cyclone III [2 articles]

Rob Gaddi - 2011-10-27 08:03:00
I've got a project going on a Cyclone III, and have hit an issue that seems like it has a simple solution if only I already knew it. I've got a 125 MHz input clock (CLK125). I've got an ADC that...Clock Phase Fun on Cyclone III

Peter Alfke has passed away [20 articles]

Suhaib Fahmy - 2011-10-26 16:16:00
Those who've been on this newsgroup for any period of time will remember Peter Alfke, the Xilinx legend, and his infectious enthusiasm. He was a great help as I got into FPGA design 8 years ago, as...Peter Alfke has passed away

Modelsim on windoz save settings in a file rather than registry [3 articles]

dgreig - 2011-10-26 13:05:00
Hi Is there any way of getting modelsim not to use the widoz registry for settings. I would prefer if it would use my .modelsim file. I find it impossible to express the extent of my disgust a...Modelsim on windoz save settings in a file rather than registry

newable need help [2 articles]

2011-10-26 08:23:00
hi all. im currently learning FPGAs and having big interesting in it. but the only place i can practice is the uni lab. i wanna practice at home with my own laptop as well. but i dont know which so...newable need help

FPGA functional flow..please help! [3 articles]

vibha - 2011-10-26 01:58:00
Hallo, I am new in the world of FPGA. I am asked to design he functional flow for a image processing hardware. The hardware i.e FPGA will be used for video decompression . Hence it has to receive...FPGA functional flow..please help!

ADC by using counter method on FPGA using VHDL language [3 articles]

VIJAY KUMAR - 2011-10-26 01:47:00
Hello,i have some idea about vhdl.I want coding of ADC by using counter method on FPGA by using VHDL.. I know the some idea about this program the following process. a) first reset the counter b)...ADC by using counter method on FPGA using VHDL language
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