Comp.Arch.FPGA interface on FPGARelated
Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.
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Posted by Al Clark - 1 day ago
I am designing my own Altera Cyclone V SoM board. It is not
intended to be a dev board. It will be a function module that
also includes Analog Devices' SHARC DSPs.
I am working on the JTAG con...
Posted by alb - 2 days ago
I started adding false paths to my design (see this thread for a
context: ) but in order to avoid funny
names, I started to add wildcards.
My false path constraints look like ...
Started by Unknown 3 days ago
My .v Verilog source files were in a separate folder to the IDE build
directory, containing all the stuff generated in the build. Then I had
a hard disk crash, and (long story) everything *except* t...
Posted by Les Cargill - 6 days ago
Posted by Mike Perkins - 6 days ago
Has anyone come across an issue where an XC3S200 is recognised in
Impact; "Right Click to Add Device or Initialize JTAG chain", and then
can't read the device ID, status or indeed do any...
Posted by Raviraj Makwana - 6 days ago
unable to solve this error.I tried all the thing and check that there is no duplicate module..still its giving error..any one can help???plz
Posted by Brane2 - 6 days ago
I'm playing with Lattice's MachXO2 and ECP3 for a few months now and now that MachXO3 is about to come out I wonder what happened to ECP4.
As I understand it, Lattice found its market niche in low-...
Posted by Bruce Varley - 1 week ago
I'm an FPGA newbie, working with the freeware Altera Quartus II IDE. I used
the megafunction builder to create a FIFO memory, the .v file it generated
is similar to the virtual prototypes created ...
Posted by marwen brikcha - 1 week ago
I'm usinf Digilent Nexys 4 FPGA BOard and I won't to run LInux kernel on microblaze and I don't have a lot of information to complete this project .
Can anyone help me (link,tutoriel, hel...
Posted by alb - 1 week ago
we have a license server that hosts both ACTEL_SUMMIT feature (1 seat)
and ACTEL_VISTA one (10 seats).
Is there a way in Designer to specify either from the command line or