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Recent Blogs on FPGARelated

Point of View
posted by Christopher Felton


Spline interpolation
posted by Markus Nentwig


BGA and QFP at Home 1 - A Practical Guide.
posted by Victor Yurkovsky


Introducing the VPCIe framework
posted by Fabien Le Mentec


How FPGAs work, and why you'll buy one
posted by Yossi Kreinin


Learning VHDL - Basics
posted by Enrico Garante


Yet another PWM
posted by Anton Babushkin




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DSPEmbedded Systems

Comp.Arch.FPGA interface on FPGARelated

Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.

There are 17920 threads in our archives.

You are looking at page 1 of 1792.

The threads with the newest articles are listed first.

Bypass Xilinx flexlm license check [7 replies]

Started by Unknown 10 minutes ago

Hello, While I certainly do not condone piracy, and I believe Xilinx should be com= pensated for their hard work, sometimes it can be handy to run ISE without = limitations on the range of target...Bypass Xilinx flexlm license check

disadvantages of inferring latches [43 replies]

Posted by ronhk25 - 2 hours ago

Hi all, I always hear from FPGA designers that latches are "dangerous" and that it'= s very important avoiding them. I wonder what are the technical risks resul= ting by using latches. ...disadvantages of inferring latches

What would you say is the best board to buy

Posted by Julian Gardner - 13 hours ago

Im looking at a hardware project which will be a DVB-CSA descrambler. Idea is a pci-e board with an FPGA, any body know of a nice development board that i can buy off the shelf, which will take i...What would you say is the best board to buy

Linux USB JTAG Cable Driver for Xilinx Impact [2 replies]

Posted by Ron Aikins - 1 day ago

I've read much on this topic elsewhere, but I'm confused on some things, no= t to mention some of what I've read is out of date w.r.t. s/w versions, etc= . I've been frustrated on a previous attempt...Linux USB JTAG Cable Driver for Xilinx Impact

Program IO 1.2V [7 replies]

Started by Unknown 1 day ago

Hi, I would like to create a project with FPGA. You can imagine it as a debug board that need to communicate to other systems with defined protocols and standards... I would like to begin with a s...Program IO 1.2V

CFP: Symposium on Architectures for Networking and Communications Systems (ANCS)

Posted by Eric Keller - 1 week ago

-------------------- CALL FOR PAPERS -------------------- The 11th ACM/IEEE Symposium on Architectures for Networking and Communicati= ons Systems=20 (ANCS 2015) http://www.ancsconf.org May 7...CFP: Symposium on Architectures for Networking and Communications Systems (ANCS)

practical experience with GPL IP core in commercial product [50 replies]

Started by Unknown 1 week ago

I was wondering if anybody has had practical experience using IP licensed with the GNU Public License (GPL, not LGPL) within a commercial FPGA development. I found some Verilog under GPL I would li...practical experience with GPL IP core in commercial product

How to get optimized/correct PLA or SOP output from abc with selectable phase? [1 replies]

Posted by Johann Klammer - 2 weeks ago

I can not seem to get a decently optimized .PLA file out of the abc I have: a blif of some combinatorial circuit. What I want: the SOPs for a single output bit as a .PLA file (or somethi...How to get optimized/correct PLA or SOP output from abc with selectable phase?

USB PHY recommendations [11 replies]

Posted by Mike Perkins - 2 weeks ago

I have started using the TI TUSB1210 which is a USB PHY with a ULPI interface. However, I can virtually guarantee that during enumeration, the device will lock up with DIR permanently DIR hig...USB PHY recommendations

bitstream support for Artix 7 in torc?

Started by Unknown 2 weeks ago

Does TORC provide bit stream generation for Artix 7 devices??? Looking at the torc source files, i see classes only for bistrem for Spartan and Virtex family. Can it be used for Artix device?? If not...bitstream support for Artix 7 in torc?

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