Cyclone
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Philipp Klaus Krause - 2011-02-05 15:13:00
A few days ago I had a look at FPGA prices at digikey. Looking at EQFP
packages I noticed that at every LE/memory point the Cyclone IV is about
40% more expensive than the equivalent Cyclone III.
Why is the Cyclone IV so much more expensive than the Cyclone III?
Philipp
...
Serkan Oktem (Alumni) - 2011-09-08 04:59:00
Dear Gurus;
I have 1 Cyclone IV GX EP4CGX150(DF27C7)
This Cyclone IV is connected to 6 x Cyclone III (C40F484)
All of these 6 Cyclone IIIs will send 4 bit LVDS serialized input data
and a clock(120mhz)
I need to deserialize 4 bits of data with their respective clocks by
Cyclone IV GXEP4CGX15...
Martin Schoeberl - 2006-08-03 12:14:00
Hi group,
using a 128x32 bit simple dual port memory with independent
read and write clock results in following fmax for both
clocks (dout is registered):
Cyclone (I) 256 MHz, Cyclone II 210 MHz (restricted)
That's a little bit strange. Especially since the fmax for
the memories in t...
I am looking for a Future Electronics Cyclone NiosII Development Kit with a
1C12 Cyclone FPGA. It was on sale last month for $50 and sold out. Please
respond to ppilabs@yahoo.com.
...
Ioiod - 2007-08-01 00:37:00
I looked on Altera's website, but I could not find any description on how
distributed (LUT-based) RAM works on the CYclone II/III family.
FOr the Stratix III, I see Altera called this feature "M-LAB." Am I
missing something obvious? Or do the Cyclone family simply not
supported distributed R...
Hello,
I've quickly written AHDL code ( out = !in ), assigned out to the led
pin and in to the on-off switch pin. Then I downloaded that code into
Cyclone using ByteblasterII. Quartus reported that everything gone fine.
BUT...
....all the leds started to blink (including the erro...
MikeF - 2007-03-26 07:47:00
Hi
I am about to start on a design that will need a number of smallish
memories. i.e. 8 deep x 16 wide shift registers, small FIFOs etc. I am
looking at the Spartan 3E and Cyclone II/III.
The distributed memories in the Spartan 3E seem like the clincher. Why
would I use a Cyclone and either...
majsta - 2011-08-15 18:25:00
Hi there, i just fount this page and i hope that you can help me. Here is
what i need to do. I want to interface MC68000 to cyclone II. As you
allready know MC68000 is 5V system and i need to convert that signals to
3.3V so i can use it in cyclone. I was working with txs0108e and now i know
that 5V ...
Antti - 2009-11-04 02:02:00
Hi
Altera is promising 25% more fabric speed than S6 with their new
Cyclone IV
Antti
...
Hi Luc,
I don't have much to add -- Ben has covered most of the high points.
> Has someone seen samples yet, knows something more how they compare
> (performance, pricewise).
On a performance front, you will find that Cyclone and Cyclone II have
a significant performance advantage over ...
fpgabuilder - 2007-03-20 17:44:00
Hi folks,
Is it possible to get EPROMs for Altera (Cyclone 2) devices that work
at 1.8V?
I appreciate the help and insights.
Best,
Sanjay
...
Hi Gabor,
You may want to consider the Altera Cyclone EP1C4 device. This device uses
a staggered pad ring to deliver more I/Os (and consequently fewer LEs) in a
given die size than the other Cyclone members. The device is available in
324- and 400-pin FBGA packages giving you 249 and 301 use...
Piotr Wyderski - 2005-05-15 10:44:00
Hello,
I have a system composed of a Cyclone device and an
8051-like CPU, which acts as a passive-serial configuration
device and later as a USB2.0 coupler. The FPGA
configuration image is clocked to Cyclone using the UART
interface (synchronous mode 0, i.e. TXD acts as DCLK
and RXD present...
2007-10-18 13:25:00
Hi,
I have a Cyclone III FPGA. I have created a circuit on it whose
performance I want to observe under the influence of supply voltage
variations and glitches.
I want to create intentional glitches of this cyclone iii development
board. Any ideas?
-PrincessGateArray.
...
Marc - 2004-09-23 09:40:00
Hello,
I am thinking about using a Cyclone FPGA as Cardbus controller.
With PCI I know that the Cyclone FPGA is working without problems, but
what about the Cardbus specific requirements (or differences to PCI),
e.g. power-up current, configuration time, ...
Has anybody experiences with i...
Manny - 2007-08-21 06:58:00
Hi,
Well the subject says it all. Just wondering how does Spartan-3A DSP
compares to Cyclone III in terms of power efficiency. I know the
spartan is 90nm and hence should be less favourable. However, does it
by any means at least approach the power performance of the cyclone?
Thanks,
-Mann...
Is it possible to connect a crystal to an Altera Cyclone or a Max pld rather
an an external oscillator? And if so, is it possible to use a low frequency
crystal as a reference for the Cyclone PLLs, or do they require a high
minimum frequency?
--
David
"I love deadlines. I love the whoosh...
Hi,
When targeting the Cyclone II, the NIOS II/f configuration in SOPC
builder doesn't seem to list support for either multipler,
barrel-shifter or divide. Support for these only seems to be available
when the target is a Stratix device. Is this correct? Is it not
possible to get h/w multipl...
Noway2 - 2006-01-24 09:06:00
Check out the spec sheets on the Cyclone or Cyclone2. You will likely
need to use the PLL(s), but I believe in the smalles cyclone has more
LVDS channels than you require.
...
sdf - 2008-03-08 09:18:00
Hi.
Analysis and Synthesis for Cyclone III is SO slow.. One my design with
about 30000 ALUTs was analysed and synthesed more than 12 hours and I
finally breaked it. Target device was set to EP3C25F324 (from Cyclone
III FPGA Starter Kit).
The same design analysed and synthesed for Stratix II EP2...
Hi All,
I have a Cyclone application with a long lifetime and a high realibility
requirement (i.e. no subsequent CRC's and retries, the IGBT just turns on)
I am trying to assess the MTBF of metastable events. I have 166MHz clock and
10kHz async. inputs with a single sync. latch. Latencies ...
Dear everybody,
the goal of my post is to collect your opinions about the use of Altera Cyclone
devices in a rugged environment. I have to design a board which should control
a chopper based on GTOs. The environment is a railway vehicle and the following
are the conditions I have to consider:
...
shivashankara - 2008-07-08 14:12:00
Hi All,
I am migrating from Spartan 3e to Cyclone III. We bought only cyclone III
starter board. We don't have any USB blaster download cable. I devloped
the my current design. Now i want to download into FPGA using USB cable.
What are the steps to follow?
regards,
S Shankaran
...
badgrant - 2005-11-18 04:15:00
hi, i'm grant, studying computer engineering in university of ottawa.
i'm using altera cyclone II on up3 board with quartus II enviorment.
how is it? is it leading in industry? what kind of job can i get when
i'm done.
guys, forgive me if i have tons of questions, coz i do care about my
career whil...
Nevo - 2006-12-09 12:28:00
All,
I'm having an extraoridnarily difficult time with my first FPGA project and
am very frustrated.
I have a board designed around the EP1C6 Cyclone device. The Quartus
programmer is able to detect the EP1C6 on a JTAG boundary scan. I'm able to
initiate programming the device over the J...
Jock - 2004-10-25 09:43:00
Can a Cyclone PLL accept a clipped sine wave with an amplitude of 0.8V -
i.e. what is the maximum rise time on the edge of the PLL clock input?
...
2006-08-17 13:19:00
Hi everyone,
I compared the prices of two FPGAs from Digikey
(http://www.digikey.com):
+) Xilinx Spartan-3, XC3S1000 - 4FTG256C with LC:1920, I/O pins:173.
Price: 47.87$
+) Altera Cyclone, EP1C6Q240C8N - ND with LC:5980, I/O pins:185.
Price: 18.9$
Im relativly new to the FPGA world, bu...
Is the 50 mhz EP1C3T100C7 Cyclone have enough resources (LE) to synthesize
the nios? For example, this board doesnt have any memory, what kind of
limits will that put on the nios processor?
...
jon - 2009-05-26 11:58:00
I have 500 of the Altera Cyclone II EP2C20F484C6N these all new in
original factory packaging. I no longer have a need for them and will
let them go for $40 each. Partial quantities ok.
Thanks,
Jon
(949)864-7745
...
The Altera Cyclone Programming device EPCS1 are shown
to be programmed in the AS mode requiring an own connector.
Since the JTAG was never officially declared outdated,
I'd expect a way to program the cyclone plus the EPCS1 in JTAG
mode. I wasn't able to find it yet though.
Rene
--
Ing.Bue...
KKay - 2006-10-11 23:54:00
Hi all, I'm new in this field. Please guide me how can I proceed to
implement the cyclone altpll megafunction in my own design. I compiled
individually PLL and my own design but could not able to link-up both.
Please help me.
...
Hi
I have made a cyclone board.But when I download with jtag in quartusII.It
reached 80% and then said "Error: CONF_DONE pin failed to go high in device
1".
How should I solve the problem?Thanks!
Best Regards
...
ram - 2006-11-24 04:01:00
What are types of FPGA
like antifuse ,sram based.what is difference
under what category cyclone cyclone II device fall
thanking you
...
2006-03-18 10:09:00
Hello group,
I have an issue with porting my high-speed DDR interface to Altera
Cyclone II device. As far as datasheet says, Altera Cyclone II device
does not have any dedicated circuitry to support DDR signaling in its
Input/Output blocks for DQ pins. The only thing present in hardware is
th...
Keith Williams - 2005-06-30 23:22:00
Hi!
I've already googled and dug through several online lists of FPGA boards,
but haven't found what I'm looking for, yet.
I'm needing a Cyclone board that has at least 32 LVDS I/O pins available
(and terminated). With at least one PLL available to be driven from an
external source.
Targ...
Dolphin - 2008-05-15 05:10:00
Hi,
I am drawing schematics for a new system that uses a Cyclone 3 FPGA. I
have some LVTTL (3V3) signals on which I would like to use a 50R
series termination.
The Cyclone 3 has two possible 50R series terminations:
- not calibrated
- calibrated
The handbook doesn't specify the standards th...
Altera only mentions the ByteBlaster II for programming Cyclone devices.
Presumably the ByteBlasterMV doesn't have the right voltage thresholds,
strictly speaking, but I was wondering if it could be used in a pinch. I
made my own from the published schematic (it works fine with Flex10K
devices),...
On an embedded test-platform we have to configure a remote Altera Cyclone
device via its JTAG chain.
Our test-platform also has an Altera Cyclone fpga with a NIOS I SOC.
We like to program the remote Cyclone via its JTAG.
Right now we think the best method is to port the Altera Jrunner software ...
jai.dhar@gmail.com - 2005-09-19 15:08:00
I am posting this again because I don't think my previous one went
through, so my apologies if it did and I lost it... I am looking for
pricing on Cyclone FPGA's in the 10-20 Quantity range. My usual
supplier is Digikey since I'm in Canada, but it costs $50 for a EP1C240
Cyclone, which I think i...
Philipp Klaus Krause - 2007-06-01 10:47:00
The Cyclone 3 Starter Board has this strange "High-Speed Mezzanine
Connector (HSMC)".
I'd prefer something simpler, such as a 0.1" header. Are there any
adapters / daughterboards available?
Philipp
...
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