NIOS
Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.
We found 509 threads matching "nios"
You are looking at page 1 of 13.
The most relevant threads are listed first
Jerry - 2004-08-19 21:09:00
I replaced my NIOS I with a NIOS II and did a simulation. Hummm it seems
to take a lot more CPU time with a NIOS II. Has anyone else experienced
this?
ARRRRRGGGGGHHHHH
Jer
...
NickNitro - 2007-09-27 00:34:00
Hello.
I'm getting a better outline of what's available and the differences
between the different options, such as FPGAs and CPLDs. Although, I've
just come across Alteras "Nios II Embedded Processor" and to be honest
it's thrown me off completely.
- What is a soft-core processor?
- It see...
Has anybody actually received updates to their Quartus and Nios toolkits
to support Nios II ?
Geoffrey
...
Jack - 2004-01-11 22:30:00
hi. i am going through software dev. tutorial that came with nios dev.
kt for cyclone and whenever i tried to run insight debugger with
byteblaster II, it always said "failed to connect.
here is the command line:
nios-debug lcd_demo1.srec
# [nios-gdb-server] accepting gdb connection
# [nio...
Peter Sommerfeld - 2005-04-27 23:53:00
Hi,
Awhile back I tried having Nios II and a separate cygwin (from
cygwin.com) on the same machine, but ran into big problems. I now want
to install the latest Nios II eval kit but I'm not sure if Altera has
fixed things so they can co-exist.
Does anyone have a stand-alone Cygwin and Nios I...
Altera finally wakes up. They realize that the window register type
architecture is not good for FPGAs and probably in general. They can
no longer support their own marketing hype about how great Nios I is.
If Nios 1 was so great, why did it need a complete redesign and
rearchitecture? It means ...
I have an SRAM controller Avalon slave we created which Nios can
successfully access to read and write SRAM.
My question is: I can not set the program or data memory address in
the Nios setup screen to this memory. Why not?
Also: How does Nios determine where a malloc() will allocate memory
...
Is the 50 mhz EP1C3T100C7 Cyclone have enough resources (LE) to synthesize
the nios? For example, this board doesnt have any memory, what kind of
limits will that put on the nios processor?
...
badari - 2006-02-07 02:04:00
hi all! I'm using NiosII with StratixII. i wanted to get interrupts
from a micro controller of 7.393MHz Oscillator which generates half the
oscillator clock. Nios works at 50Mhz. so what modification i need to
do on nios
...
Hi There,
I am an Nios developer , i build toons of project for this excellent
soft-core, now i migrate to Nios II, nothing problem except one!
i need to convert an .out file to binary using nios2-elf-objcopy ...
the line is : nios2-elf-objcopy -O binary xxxx.out xxxxx.bin
well the binary...
Hi,
I am using Quartus 2.2 SP2 with Nios 3.0
I have fit my logic with the SOPC into the Niosstructure and generating and
compiling of this is fine.
I am testing on a stratix devel. board. Programming of the fpga works out
fine too.
The problem is, that no programm runs on the nios. (i.e. he...
John - 2004-08-01 04:16:00
Dear all,
I am trying to download hello_nios.srec to nios, using the sdk by
typing the following command:
nr hello_nios.srec
I am following the software tutorials provided by altera. for some
reason, it is not working, it gives:
[SOPC Builder]$ nr hello_nios.srec
nios-run: Ready to...
tns1 - 2004-04-17 18:10:00
I have downloaded the quartusIIwe, and used it to synthesize some
modules for cyclone parts - works great. Now I would like to try SOPC
builder and compile some C for an existing nios board, but am a little
confused about the toolchain.
QuartusII comes with cygwin, but it looks like there i...
evan - 2005-08-29 01:53:00
Hi,
I have been trying to debugg a simple "hello world" program running in
an Altera Cyclone device with Nios 32 (including OCI-Core) via JTAG. I
can use serial comms for the upload but I need the serial
communications available during execution. The problem is that the JTAG
upload gives me t...
Dolphin - 2007-04-03 05:39:00
Hello,
I want to recompile the bootloader for the Nios processor. The reason
that I want to do this is:
- I use an EPCS flash
- by default Nios code is situated directly after the FPGA bitstream
- I want the Nios code to be in a different sector as the FPGA
bitstream
I guess that I will h...
Austin Lesea wrote:
> Jim,
>
> *
>
> *.......I have been admonished for commenting on competitors in this
> forum. That will have to be left up to others like yourself.
>
> A careful review of all of the features of St2 will have to be left to
> others.
>
> Perhaps Ray A...
sriman - 2008-01-22 14:08:00
hi.
i have made a fuzzy system in matlab. i have converted that into a c
code using the real time tool box of matlab.
i want to import this code and run a NIOS processor, can i do it. i
tried to create a blank project in NIOS IDE and then add the files to
the directory and change the make fil...
Tomorrow is the big Nios II launch date, but info is already going up....
www.altera.com
http://www.fpgajournal.com/articles/20040518_nios2.htm
Full 32bit. 2X-4X faster than Nios I and starts at only 500 LE's. New IDE.
New Compact Flash and other periferals.... Can't wait to get a hold ...
Hi,
I'm using a Nios to access off-chip memories via the SoPC-builer's
external memory bridge. The Nios is 32-bit data, the memories are
16-bit data. Using SignalTap I can see that Nios is only accessing
even addresses in the external memory (using germs monitor commands
and/or my own c-code...
Ewa - 2007-03-05 10:07:00
Hi All,
is there any chance to run Nios II Multiprocessor Collection in command
line?
I have the system with 2 cpus. I've tried to run the programs
separately, but in that case mutex doesn't work properly. Perhaps smth
wrong with cpu's ID value.
Note: from Nios II IDE it works fine,...
PaulK - 2007-10-23 09:26:00
Hi,
I'm looking for a very compact TCP/IP stack for the Nios II, and the
ThreadX/NetX combo seems to be, at least on paper, the smallest. Anyone
using this combo? How small are you able to build it, and with what
services? How is their support? Any issues integrating it with the Nios
...
Does anyone know if there are concrete plans for a Nios II port of eCos?
There are several other OS'es ported to the Nios II already, such as
uC/OS-II and ucLinux, but I've heard nothing regarding eCos other than
four-year-old promises that Altera and Red Hat were working on it.
--
David
...
Hi,
Has anybody been trying to use gprof within the NIOS II IDE ?
We have some problems regarding the profiling data that is
send through the jtag interface directly to the IDE console window.
We had a look to the documentation but there is little information
regarding the use of the profi...
Hello,
I can download a program to memory using "nios-run my_prog.srec" and
it works fine.
However, when I write the program into the same memory manually (ie.
memory fill command), nios will not wrong the program properly.
I verified that both methods write exactly the same program bytes...
tns1 - 2004-07-15 10:51:00
I am trying to understand the low level startup sequence on a custom
Nios board. When the Nios (3.2) resets, what determines where it fetches
its very first instruction? Is it always from the onchip bootstrap area
or is this configurable? I don't have the OCI so I assume I can't just
step th...
Benoit - 2005-06-07 12:19:00
Hi,
I'm trying to use a NIOS Kit Eval Board (Stratix10).
I would like to do a small application :
=> incr a counter value in FPGA (VHDH code)
=> convert this value Hex to Dec in FPGA (C code)
=> use NIOS (UART) to display this Dec value in IHM (SOPC, Hyperterm, ...)
I'm searching samp...
2007-09-02 22:36:00
I use the Nios II system to achieve my design. I have define a data
bus from the outside of the FPGA, I use a 8-bits PIO ip to connect the
signal and the FPGA.
I want to achieve the following aim: when the outside signals
changes, Nios generates a IRQ to CPU, and I can insert my
instructi...![[Nios II] How Can I define the pio inputs as a interrupt?](http://www.fpgarelated.com/new/images/
icon_more.jpg)
Hello,
I'm trying to operate the nios processor with my
crypto-processor .
The default clock frequency (33.33 MHz) is too slow for fast
cryptosystem performance. I'd tried to get another clock with 50 MHz
frequency through PLL and generate the nios processor with 50 MHz in
th...
2006-05-02 02:10:00
Hi all,
I have a problem driving the RESET pin on a NIOS II processor. I expect
that when I pull LOW
this pin, the NIOS II processor makes a reset. But this is not true,
instead it reaches an
unstable condition.
Obviously, I make something of wrong, but where ? Do you have
experienced my ...
On an embedded test-platform we have to configure a remote Altera Cyclone
device via its JTAG chain.
Our test-platform also has an Altera Cyclone fpga with a NIOS I SOC.
We like to program the remote Cyclone via its JTAG.
Right now we think the best method is to port the Altera Jrunner software ...
evan - 2005-03-25 02:42:00
Nios-convert is causing me grief.
I am converting a 2249kB srec to a .mif but getting the following error
message:
nios-convert A.srec c:\B.mif
Out of memory!
Does anyone know why this is occuring? I am working on a fairly decent
machine. The .mif turns out (whe...
Piotr Wyderski - 2005-02-18 20:07:00
Hello,
how fast a Nios processor can be if embedded
in a speed grade 6 Cyclone FPGA? What is the
approximate maximum reachable clock frequency?
Best regards
Piotr Wyderski
...
Hello,
I use quartus II 4.00 and SOPC builder 4.00 to build a NIOS system on a
Stratix II board.
I enabled the support for external interruptions, add a user defined IP
connected via the provided avalon ahb bridge.
Everything is ok.
Then I try to use the interruption of the bridge, everyth...
Hi,
When targeting the Cyclone II, the NIOS II/f configuration in SOPC
builder doesn't seem to list support for either multipler,
barrel-shifter or divide. Support for these only seems to be available
when the target is a Stratix device. Is this correct? Is it not
possible to get h/w multipl...
Chris - 2006-10-23 22:29:00
I am evaluating using the Altera Cyclone with Quartus SOPC vs. Xilinx
Spartan3E and PicoBlaze. I need a soft core processor and I think PicoBlaze
would be enough. SOPC and Nios-II is very powerful but the learning curve
looks like a potential nightmare to me. In order to use SOPC I might have
...
Can anybody tell me what is the effect of debug option in nios-build
command to the original program? What's the usage of debug script that
generated in the command?
I'd connected my processor as a user defined peripheral to nios system
module through SOPC Builder. The system performs corectly...
jfh - 2006-11-29 02:43:00
Hi,
I am presently involved in a project dealing with a pretty large design
in a Stratix II GX chip with a Nios II processor. Is there anyway to
perform hardware in the loop simulation where the Nios II would be
running on a board while modelsim is simulating the design ? Does
anyone have an ...
Don't forget to look at the Altera's NIOS II. You can buy a developers
kit (board and development tools) for about $1000.00. You can download
Quartus II Webpack and NIOS II Evaluation from their website.
Derek
...
2007-12-19 05:46:00
Which makefile should I use and where should the current working
directory be located if I want to run a NIOS-II software build from
the command line or emacs (linux or cygwin) rather than using Eclipse?
Have anybodu used Emacs/GUD to interface to the NIOS-II gdb debugger?
Thanks
Petter
...
Colin - 2004-06-29 20:29:00
Hi,
I'm trying to use the Nios Ethernet Development Kit to run a simple
example program, it build fine, but when I run it it comes up with a
"spurious interrupt number: 0000 001C" error. Does anyone know how to
solve this problem.
I'm using the Excalibur Apex development board, Nios 3.0, ...
|
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
11 |
12 |
13 |
next