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PCI
Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.
We found 811 threads matching "pci"
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The most relevant threads are listed first
pci-x133 to parallel pci-66
Chad Bearden - 2003-10-09 17:42:00
I would like to split a pci-x133 bus into 2 parallel pci-66 busses.
Has anyone done this? I'm not afraid to purchase the Xilinx pci-x
core and halfbridge IP but just looking for some wisdom.
|--------|
| |
| bridge |
...
PCI Slot Expansion
Hui Li - 2003-11-14 07:23:00
I want to design a pci board which will expand one pci slot through a
pci-bridge and pci-local bus and get two slot. I wonder if there is
any driver problem? say i plug a audio card into the expanded slot?
thanks
Hui
...PCI arbiter doubt
2005-06-14 08:13:00
Hi all,
I have some basic doubts on PCI arbiter.
1)how is the framen controlled -- i guess it is a shared resource on
the PCI bus wher all the devices sitting on the PCI bus have access to
it.
2)If a request is received from a device on PCI bus ,should the grant
be issued immediately...Host-PCI Bridge
naveen - 2003-10-02 00:45:00
Hi group,
I had a small clarification on Host-PCI Bridge. For Host-PCI
bridge design, PCI 2.3 specs. itself are enough or PCI-PCI Bridge
specs. are needed? Also in case of a Host-PCI Bridge, can we have
Memory Read line, Memory Read Multiple, Memory write and invalidate
commands execu...pci protocol analyzer
Chad Bearden - 2003-10-16 10:03:00
Could anyone recommend a tool for analyzing the pci or pci-x protocol?
I'm developing a pci-x board that will plug into a pc architecture. I
have googled around and found several manufacturers but am looking for
testimonials from those that have actually used such products and
would comment o...constraint for PCI & PCI-X core
2004-12-23 07:40:00
Hi,
I have a 100 MHz PCI-X core for Xilinx device.
As a part of PCI-X standard the core is also compliant with PCI 33 MHz.
Now I have a problem with the ucf clock frequency constraint.
Since I want it to work in PCI-X 100 MHz I constraint to clock of
100 MHz; but then the PCI 33 MHz log...PCI design with vhdl
kender - 2004-12-10 09:21:00
Hi, I've read that many of you have realized PCI card using FPGAs...
I have to do something similar, but I hope simpler, for my thesis (I'm
an university student): I have to realize a PCI core (but it should
work as a target only device) that should transfer some data that is
collected by the F...References to good PCI boards and some newbie questions - please help!
Valery - 2004-01-21 07:26:00
Hi,
we are starting a project in our group porting several CPU intensive
but simple apps to FPGA platform. We have selected PCI as a way to
communicate with a host PC. We have some experience programming FPGAs
but not PCI-based (need PCI now due to data transfer speed
requirements).
I woul...PCI driver for ARM processor
Chanemou - 2004-07-27 07:30:00
Hi,
Is there any place where I can find a sample template PCI device
driver for the "PCI card with ARM9 processor" Or can anybody mail me
the skeletal driver of the PCI driver. I am new and have to write a
device driver for a PCI based device on OSE RTOS.
Thanks in advance,
Chanemou
...Checking the PCI master implemented in FPGA
2005-08-29 07:17:00
Hi All,
I have implemented a AHB-PCI IP in the virtex2pro FPGA.
While accessing through ARM JTAG AMBA side is okay , but PCI is not
working.
I basically want to know what are the basic steps to check the PCI
interface .
Is there any specific procedure or checklist ?
Waiting for your reply...PCI
axalay - 2006-11-04 06:02:00
May I connect 11 PCI cards (in each I use Xilinx FPGA) in one PCI bus,
if use to generate IDSEL signals AD 12...AD31 lines. One card is master
and other is slave.
...Pci problems
Dan - 2004-12-03 10:21:00
1. On a pci target a have on the pci bus signals pci_ad[31:0] and on
the backend interface a have bkend_data[31:0] (for data r/w) and
backend_adr[31:0] (for address r/w). If I interface a fifo 512x32bits
I must connect bkend_dat[31:0] on the fifoin_dat[31:0]. But fifos
don't have address lines. ...Spartan II 2s200 PCI Board
stbcasa - 2005-07-06 11:06:00
Hi everyone,
I recently bought a Spartan II 2s200 PCI Board to use in a project.
I programmed it with the Opencores PCI core. The problem is that when
I plug it in the PCI slot of the computer the board turn on but the
computer doesn't and the computer work well without the PCI board
plugged...FPGA to PCI Bus Interface
AndyAtHome - 2004-07-11 17:11:00
Hi All,
I'm need to interface a Xilinx Virtex to a PCI Bus. The Xilinx PCI IP
core is too costly for the volumes I will be building, so I'm looking
at PCI controller chips.
From experience can anybody recommend a vendor, such as Quicklogic,
AMCC, Tundra, etc.
Thanks,
Andy.
...Xilinx EDK PCI
Jackson Pang - 2004-07-15 12:12:00
Hello
I'd like to know if anybody had any success in using Xilinx OPB/PCI bridge
core using EDK. I set up the project and configured all the core parameters
correctly. I also double checked the constraint file for pin assignments for
the PCI finger. The compile and programming process goes we...Writing PCI constraints in Altera
tushit - 2004-04-13 13:20:00
Hi,
I am fairly new to FPGAs. I am trying to write the constraints for the
PCI module on an Altera Stratix device. I am using QuartusII for all
synthesis and P&R.
The PCI spec says I need to ensure a setup time of 7ns for all pins.
The PCI clock itself works at 33Mhz. I want to know the followi...PCI master clock trace
2005-06-02 07:40:00
Hi Guys,
Is there another standard of PCI for master? i think of this because i
have observed that clock trace
in the motherboard of personal computer from noth bridge to 3th slot of
PCI connector is more than 2.5 inches.
We are designing an PCI master in one of our design.
Thanks and rega...FPGA-pci communication
Nitesh - 2005-12-14 14:28:00
I have a virtex II pro fpga pci board. I have to transfer data from
fpga to the host computer over the pci bus.How should I go about it?
I have a external pci bridge on the card between fpga and the pci.Now
the vendor doesnt provide any details. I have a program given by vendor
which can read da...Cheapest FPGA with decent PCI- e interface ?
Brane2 - 2009-07-01 18:04:00
So far, I have only been able to find Spartan6 ( which isn't really
available yet) from Xilinx and some small FPGA from Actel ( Igloo
family ?).
Trouble is, Spartan has only two lanes, which is enough only for PCI-e
x1.
Actel had more lanes- AFAIK enough for PCI-e x4, but was very small.
...Which PCI core for Cyclone II board?
Brian McFarland - 2006-07-18 14:55:00
Does anyone have experience with more than one of the PCI cores out
there? I'm working a PCI card that's still in the early stages of the
design. I'm hoping to be able to do pretty much everything on a single
Altera FPGA - most likely a Cyclone II device.
I've looked at the PCI Compiler from...Altera Nios II & PCI Compiler 4.1.0 Question
Sander & Stieneke Odekerken - 2006-04-11 13:22:00
Hi,
I'm using SOPC Builder and added some components, including NIOS II,
external RAM and a PCI Host-Bridge (PCI Compiler 4.1.0). Is there, by
coincidence, a reference design available of a system using Nios II and the
PCI Compiler together? I know there is a reference design in the PCI
Compi...PCI configuration questions.
Mike Zhang - 2005-09-14 21:17:00
Hi folks, I am starting to implement a simple PCI core using Spartan-II. I
have already implemented the basic read and write transfer before I find
this IDSEL signal which is used by PCI configuration transfers. My PCI board
just needs to read and write data from/to a fixed address. There is n...PCI doubt
Shreyas Kulkarni - 2004-12-16 20:17:00
hi there,
i have a (probably very fundamental) doubt regarding PCI -
what is the difference between a PCI master, arbiter and initiator?
they all look same to me.
TIA,
Shreyas
...Spartan2E + PCI
Ed Diego - 2003-07-06 14:44:00
Hello,
I need to design a PCI board. I was thinking about using a Spartan2E to do
all the hard work. Would the I/O pins of the Sparan2E be able to connect
straight to a PCI bus? I'm thinking in terms of voltage levels. Also,
before the board is made I was planning on making a prototype usi...PCI newbie problems
Massi - 2008-12-24 11:40:00
Hi everyone,
I'm trying to set up a toy design on a Xilinx Virtex 5 (Avnet PCI
Express Development Kit board) and I'm having big problems to
understand how PCI works. I downloaded the PCI endpoint core bitstream
for the Programmed IO on the board and plugged it into a pc,
everything seems to ...Xilinx Spartan II and 5V PCI
Christian E. Boehme - 2004-08-27 00:46:00
Hello all,
I am using a Xilinx Spartan II FPGA on a prototype PCI add-in card
as the PCI device attached to the bus. According to the Spartan II
data sheet it appears that 5V PCI compatible IOs are indeed instantiable
which was the very reason for going with a Spartan II in the first place.
...pci ml310 board
Nitesh - 2005-11-08 19:07:00
Hello,
I am using xilinx ml310 board. Now I want to use networking feature on
the
board
and hence I have to enable the "ENABLE PCI" option in the
configuration of
kernel which I am trying to load onto the ppc.
Now once I enable the enable pci option what happens is that the kernel
during
th...which version PCI LogiCore for XC4000E?
SimonX - 2005-01-31 09:37:00
Thank you, Eric, for quick answer. I have bought some pcs of
XC4013E-PQ240-3C on eBay :) for my unprofit use in my hobby only. But
I donīt understand what is role of PCI LogiCore, when CoreGen of older
Foundations isnīt usable (... if I understand correctly). To generate
correct pci.vhd for appr...embedded PCI
colin - 2004-08-17 12:29:00
I would like to embed a device that has a PCI inteface with an FPGA
(preferably a SPARTAN 3).
Two questions have arisen before I start
1) Many PCI based chips (including the one I want to use) can be
purchased as a PCI card to speed up development. I have had a good
google without success b...PCI-X target chip with simple backend interface....
2005-05-01 06:38:00
After extensive Googling I'm unable to find a PCI-X target chip with a
simple backend interface that would act as cost effective glue logic
between a FPGA (Xilinx) and a PCI-X local bus.
Surely there is a requirement for such a ASSP device in the market
place, given the alternative is to pur...PCI in a PCI-X slot
2005-06-17 05:03:00
I have a implemented a PCI 66Mhz master/target design on an Fpga, using
an IP core from one of the well known suppliers. The core does not
support PCI-X.
The card works fine in 33Mhz and 66Mhz PCI slots. However, it sometimes
fails to be seen by the PC when inserted in a PCI-X slot.
I drive...PCI PCIX LoGi Core Problem
2005-05-10 05:32:00
Hello All,
I am using Xilinx PCI/PCIX Logicore.
FPGA is configured with a default bitstream first (either PCI or PCIX)
and if the bus is different, after PCI reset in the bus idle time, the
FPGA gets configured once again with another bit stream.
1. Is this a valid design...?
2. when I k...V2Pro & PCI Problem?
Ron Huizen - 2004-01-29 08:54:00
One of our guys just returned from a Xilinx training class where a
supposedly informed source stated that the V2Pro somehow breaks PCI support,
i.e. you can't implement a proper PCI interface in them.
Anyone heard anything about this?
------
Ron Huizen
BittWare
...V2Pro & PCI Problem?
Ron Huizen - 2004-01-29 08:54:00
One of our guys just returned from a Xilinx training class where a
supposedly informed source stated that the V2Pro somehow breaks PCI support,
i.e. you can't implement a proper PCI interface in them.
Anyone heard anything about this?
------
Ron Huizen
BittWare
...PCI interface on CYCLONE(ep1c6)
eehinjor - 2005-12-28 22:00:00
Hi,everybody.
I have some questions about pci interface on Cyclone.Would someone help
me?
First,Which pins of PCI should be pull-up or pull-down on the board?
Second,Do some resistors(33ohms or 50ohms) to be series between EP1C6
and PCI?
Thanks.
...PCI Card with FPGA
2007-01-17 07:27:00
Hi,
I am looking for a PCI card with an FPGA on it with reasonable capacity
of gates (15 million gates). I need to use this board as a hardware
accelerator in a PC environment. My exact requirements for the PCI card
are:
1. should have a PCI controller/ bridge on it so that I dont have to
put ...New PCI Express Group
Mark - 2005-08-31 19:40:00
Folks,
A new group specifically for PCI Express has been started at:
http://groups.google.com/group/PCI-Express
This group is NOT officially linked to the PCI-SIG (although they did
send us their best wishes for this group, when I asked permission), but
is designed to be an open forum for A...grabbing PCI signals, rev-eng dev board
g.wall - 2005-11-29 12:05:00
im trying to reverse engineer a windows driver
for a PCI fpga development board so i can use it on a linux machine
(write my own driver)
all i need are the command and control signals
in order to configure, do dma, reset, etc...
i need to capture these things as they are being sent from
the w...PCI Express Switch
2008-04-30 09:03:00
Hi all,
Wanted to verify a idea.
Is is possible use Xilinx PCI express core in FPGA to use SMA ports
for the physical layers rather than the normal PCI express slots?
probably some parameters needs to be modified.
Thanks
Shakith
...Cyclone II PCI & Pin Swapping
2006-05-17 15:25:00
I'm implementing a PCI104+ board which will have the opencores PCI
bridge core. I've started with the suggested layout from Alteras PCI
Megacore. But the choice of pins does not lend to a really clean
layout. If I swap some of the pins around it will clean up quite a
bit. I'm wondering if I'...