Sign in
Search Comp.Arch.FPGA
fpga by Keywords
Altera | ASIC | CPLD | Cyclone | DCM | DDR | DSP | Ethernet | ISE | JTAG | Linux | LVDS | Microblaze | ML310 | Modelsim | NIOS | OPB | PCI | Quartus | RocketIO | SDRAM | Spartan | Spartan3 | SRAM | Stratix | Verilog | VHDL | Virtex | Virtex-4 | Virtex-II | Xilinx | XST
Ads
See Also
Quartus
Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.
We found 1226 threads matching "quartus"
You are looking at page 1 of 31.
The most relevant threads are listed first
Quartus and Cygwin X-server
2006-05-25 03:23:00
Hi!
I'm running Quartus in remote Linux workstation and I use Cygwin
X-server in my PC.
If I use gnome desktop (xwin -query) Quartus opens nicely. But if I use
a single X-terminal (ssh -X) to open Quartus it doesn't work. I receive
an empty white Quartus splash screen. Option -no_splash doesn...
Exploring Quartus' Messages and Warnings
alterauser - 2006-09-05 11:43:00
During the synthesis process, Quartus reports "Ignoring invalid
Fast-IO-Timing Assignments" which I am not able to discover, since
Quartus does not say WHERE or WHICH assignment is set incorrectly. Any
Idea ?
...initializing custom memory with .mif (or .hex) in Quartus 3
2004-10-25 03:45:00
Hi all,
I use a small memory block in my design. It's a hand-coded (VHDL)
dual-port ram, that's recognized by Quartus as memory.
However, when synthesizing, Quartus rightfully complains that
no initialization was set to the memory. I looked in the help,
but found no way to initialize MY memor...Problem with quartus 5.0 sp1
czerstwy - 2005-08-17 16:18:00
Hello
I've got problem with Quartus 5.0 with Service Pack 1. Problem occurs in
compilation process after fitting. When assembling is at 47% I get
'Quartus II Internal Error' which says:
'Internal Error: Sub-system: ASM, File: asm_ram_model_base.cpp, Line: 3430
clock_is_used == clock_found...Re: VHDL simulation
Shyam - 2006-02-17 00:54:00
Hi,
You should be able to use Altera's Quartus II for carrying out this
simulation. There is a free web edition of Quartus II at
http://www.altera.com/products/software/products/quartus2web/sof-quarwebmain.html
I do know that Quartus II accepts edif as input. But you would have to
specify...Quartus Debian Install
Matthias Braeunig - 2004-11-26 08:44:00
Hello!
as I see there are people here using Altera Quartus II.
Has anyone succeeded installing Quartus on systems other than RedHat?
I'm looking for hints how to run the installer with csh on a Debian
Linux with kernel 2.6.8. Any help is greatly appreciated.
Mat
--
...SystemVerilog Verification Example using Quartus and ModelSim
jjlindula@hotmail.com - 2010-01-14 15:48:00
Hello, I've been using the Quartus Simulator for many years and have
recently started learning about the SystemVerilog Verification. I was
hoping to find someone that has done this and is using Quartus. I am
new to ModelSim and I configure Quartus to launch ModelSim to run my
simulation. If anyo...Strange synthesis behavior from Quartus II 2.2
Prashant - 2003-09-25 17:07:00
Hi,
I have a design that was compiled in Quartus II 2.0 (SP2) and used
22,000 logic elements on the APEX20K1500E device. I compiled the same
design in Quartus II 2.2 (SP2) and it takes 42,000 logic elements !!
Has anyone seen such strange behavior with Quartus II 2.2 ? If so, how
is this bug ...Incremental Comilation in Quartus 4.2
jjlindula@hotmail.com - 2005-05-27 15:59:00
Hi, I've recently upgraded to Quartus 4.2 and discovered the
Incremental Compilation feature. Has anyone had any problems using this
feature, anything I should know before trying it out? If anyone has
anything to share please let me know. I'm using Quartus 4.2 for my
Stratix design.
Thanks,
...Quartus db issue
Martin Schoeberl - 2005-12-01 08:09:00
I was now searching for an error in my design for hours....
As a last try I removed the folder db in the quartus project
folder, compiled again and -- voila, the design worked!
Weird!
BTW: I'm invoking Quartus in batch mode from a Makefile.
Anyone had similar experiences?
Martin
...Altera Quartus II on Linux
Miika Pekkarinen - 2004-06-20 13:04:00
Hello,
I have Altera Quartus II 4.0 software and I managed to successfully install
it on a Debian Linux machine (with Intel Pentium 4 processor). However,
always when I try to start the software, I will get the following messages:
"Choose the preferred look and feel for the Quartus I...Quartus for linux
lbroto - 2004-04-07 08:08:00
Hi !
I'm lookink for a quartus web edition for Linux.
I read some news but I don't manage to find if a such version exist.
If it exists, where can I download it ? ( on altera website, I see
quartus 4 bus this version doesn't work under linux).
Thank's a lot,
-- Laurent
...Problem with SOPC Builder in Quartus 4.0
Kumar Vijay Mishra - 2004-12-16 07:01:00
Hi all,
I am using Altera Quartus 4.0 edition, which is working fine, as far
as compilation of designs etc. is concerned. However whenever I click
on Tools --> SOPC Builder (after opening a project), it gives me the
following message in a message box:
------
Error: Path to Quartus SOPC Bu...Compiling a design in Quartus that doesn't fit
General Schvantzkoph - 2010-03-11 10:05:00
I want to be able to generate an encrypted netlist of a core using
Quartus. Does Quartus have a switch that allows you to compile a design
that doesn't fit into an FPGA? The issue is that the ports on the core
exceed the number of pins on any device.
...Quartus II - Disabling the Optimizer to use gate delay
vadim - 2004-06-17 09:17:00
Does anybody know how can I disable the automatic optimizer in Quartus II
to prevent it from eliminating redundant gates ?
(I am trying to implement a delay line using a cascade of inverters, which
Quartus removes during compilation since they are logically redundant.)
thanks,
...Incremental Compilation in Quartus 4.2
jjlindula@hotmail.com - 2005-05-27 15:59:00
Hi, I've recently upgraded to Quartus 4.2 and discovered the
Incremental Compilation feature. Has anyone had any problems using this
feature, anything I should know before trying it out? If anyone has
anything to share please let me know. I'm using Quartus 4.2 for my
Stratix design.
Thanks,
...ALTERA quartus II 5.0sp1 web edition can't program MAXII: error code 84
2005-09-26 10:37:00
Hi group,
I am trying to download the design compiled with quartus II 5.0sp1
web edition into MAX II chip EPM1270T144C5. However, quartus programmer
complained
"Error: Unexpected error in JTAG server -- error code 84"
I used the same MAXII board, cable (JTAG from parallel port) and
computer ...Quartus 7.2 and PCI Express
axalay - 2008-05-08 08:29:00
Good day!
Have:
-Quartus 7.2 SP3
-Megacore IP SP2
Need:
-PCI Express.
But I have only time_limited.sof
In Quartus/tools/license Setup/MegaCore functions I see PCI Express.
And Quartus give a warinig:
using OpenCore Plus Hardvare evalution for a following cores
PCI Express Compiler (6A6...Synplify and then Quartus
Prashant - 2003-07-09 11:55:00
Hi,
I have been using Quartus II 2.0 for all my synthesis and fitting
needs for the APEX20KE device I have on my prototype board. I hear
that Quartus is not an efficient synthesizer compared to Synplicity's
Synplify. Now, I have had trouble trying to fit my design on the FPGA
and I have tried...License problems with Quartus 7.0 on Linux
General Schvantzkoph - 2007-05-07 12:46:00
I've been trying to use Quartus 7 on Linux (I've tried three different
RedHat/Clone distros, FC6, CentOS 5, Scientific Linux 4.4. The fitter is
getting a license failure,
Current license file does not support the EP2SGX90FF1508C4 device
Quartus 6.1 runs fine and my Altera FAE thinks my lic...synthesizing vqm with parameters with quartus 7.1sp1
2007-11-18 05:02:00
Hi,
I have a verilog module in my project, which is instantiated in the
design 3 times, each time with different parameters. I generated 3
different vqm files outside the Quartus project (with Synplify), one
for each instantiation. How can I tell Quartus which vqm file should
be linked to its...Bug in Altera Quartus
lecroy7200@chek.com - 2006-06-15 11:17:00
If you migrate older designs into Quartus you may get some internal
errors and the program may crash. I had dug into this some time ago to
find the root cause of the crash and spoke with Altera who confirmed
the problem. I just installed the most current version of Quartus and
the problem is s...Getting Gate Counts from Quartus
Adam Elbirt - 2006-01-17 00:20:00
Is there any way to get gate counts for a Quartus implemented design? I
know Xilinx will give gate counts out of place and route but I can't
seem to figure out anything other than LUT counts and logic element
usage from Quartus.
Adam
...Synplify 8.1 vs. Quartus II 5.0 QoR
Wenchang - 2005-05-27 23:25:00
Hi,
Recently we are considering switching from Virtex II to Stratix II.
We have evaluated both Synplify 8.1+ISE 7.1i with Virtex 4, and
Synplify 8.1+Quartus II 5.0 with Stratix II.
Synplify reports consistent results for several designs.
The large one is around 200K gate coun...Altera Quartus II 4.1 double-click on QPF-File doesn't work
Manfred Balik - 2004-08-25 08:46:00
If I try to start my Quartus-Project by double-click on the QPF-File an
error-window pops up.
I found the mistake: in the path to start quartus there are / instead of \
(I'm using Windows not Linux!).
If I change the Link, the double-click will work one time, thereafter
Quartus seems to chan...Howto disable Quartus infering M4Ks??
2008-07-19 05:13:00
I have some problems with a design I am porting from Xilinx to Altera.
The fitter dies with a message about the design not fitting into the
device.Further investiogation shows that Quartus tries to move a lot
of small shiftregisters (32-bit x 4) into M4Ks, which is a not the
best use of my embed...Acek 1K - Quartus II - timing issues
Kumaran - 2003-11-17 15:47:00
Hi all,
I am targeting my design on Acex EP1K100QC208-3 FPGA. I did most of my
development using Leonardo Spectrum synthesizer(2002) and Max +2. My
license for leonardo expired, and I decided to use Quartus II(v3.0).
When I compile using Quartus, Iam getting a negative slack time for
one of my ...Quartus ByteBlaster in Active Serial Programming mode not working
Mark Murray - 2006-05-21 07:39:00
Hey folks
I have an Elektor FPGA project board (with an Altera EP1C12k and a
EPCS4).
My board is working nicely, but I'm having an issue with Quartus,
where I can't program the serial eeprom using the active serial mode.
Quartus objects to this on the grounds that "Current programming
ha...Rumor Control:: Will Quartus phase out supporting AHDL?
jjlindula@hotmail.com - 2006-06-07 19:00:00
Hello, I posted this question a while back but I'm hearing the rumor
again from people attending Altera's Quartus workshops. The rumor is
that Altera may eventually phase out their support of AHDL in their
Quartus development software. Does anyone know what's in the future for
AHDL?
Thanks,
...Re: Back-Annotate Assignments
Ben Twijnstra - 2004-10-20 17:21:00
Hi Andre,
> what does back-annotate assignments exactly mean?
It basically means that, for instance, pin locations chosen by Quartus are
now converted to 'hard' assignments in the currently-used .qsf file.
Quartus will let you go into all sorts of detail, down to individual LE
placement....Quartus II 6.0
Frank van Eijkelenburg - 2006-10-09 04:11:00
How can I do a "clean up project" with Quartus II 6.0?
TIA,
Frank
...Quartus doesn't work with Pentium Hypertheading!
SDL - 2004-01-23 04:09:00
Hi,
I have compiled with Quartus II 3.0 SP2s a project that fills a Cyclone C12
for 89%.
Quartus ends the work later around 2.30 hours (Pentium 4 - 2.8Ghz).
If I try to compile the same project on a PC with processor Intel Pentium 4
with Hypertheading technology, Quartus doesn't succeed in en...Altera Max Plus II to Quartus migration tool
Keith Williams - 2006-05-09 23:54:00
I have a fairly large Altera-based design that will soon be updated to
Cyclone II and Quartus (from Flex10K and Max+II).
Has anyone else been through this migration that would be willing to share
any gotchas? Is the migration tool in Quartus worthwhile?
Thanks,
Keith
...Quartus 2.2, SOPC builder and leonardo
Mancini Stephane - 2003-10-13 07:52:00
Hi all,
I'm wondering how to synthesize the VHDL from SOPC Builder of quartus 2.2
with Leonardo.
Indeed, I would like to perform a synthesis separated from the Quartus P&R
for a course (I have a limited time and doing the both is far too long).
The idea is to provide students an already synthes...Quartus 7.2sp2 memory exhaustion
sdf - 2008-03-01 07:24:00
Hi.
I have Quartus 7.2sp2, MS Vista , and I have a project where I define
ROM memory (with size 4096*32 bits). I define it in verilog file in
"initial" section.
When synthesing, quartus_map.exe allocates as much as 1.5Gb of memory
and going into swapping. My computer has 2Gb of physical RAM.
S...Quartus 4.2 SP1 woes with Samba & !@#$ "Flex"LM
Tommy Thorn - 2005-02-28 00:29:00
I just upgraded from Quartus 4.1 SP2 to Quartus 4.2 SP1 and encounter a
very strange problem. If I try to compile a project, it fails before
fitting with a flexLM error 88, something about time having gone backwards.
By much trial and error I found that the problem seems to be linked to
th...Should I use an external synthesis tool?
avishay - 2006-11-07 01:33:00
Hello all,
I'm designing with Altera FPGA with their Quartus software. My company
also have license for Mentor Graphics' Precision synthesis tool. From a
very brief check, it seems that Quartus' built-in synthesizer gives
comparable results to the Precision. I wonder if there is any advantage
...Altera FLEX 8000
Vincent Perron - 2005-02-02 14:07:00
Here's a question I know has already been asked but I was not
satisfied with the answer.
How could I get Quartus II to support the FLEX 8000 devices?
I've already got a couple of FLEX 8000 chips and a complete version of
Quartus II 4.1. All the FLEX family is supported (6000, 10K, 10KA and
...Mutiple Quartus Instances?
Kenneth Land - 2004-05-06 11:19:00
Anyone know if there are any gotcha's with working with multiple Quartus (II
v. 4) projects on the same computer?
I'd like to work several approaches simultaneously, but not if there are
side effects - subtle or otherwise.
Thanks,
Ken
...