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Virtex
Comp.Arch.FPGA is a worldwide Usenet news group that is used to discuss various aspects of Field Programmable Gate Array (FPGA) based computing systems development.
We found 2705 threads matching "virtex"
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Is Virtex-4 LX succesor for Spatan-3?
Valeri Serebrianski - 2004-06-10 04:34:00
In other words, are there any chances to meet with Spartan-4 (or kind
of that) family in the future?
It looks like Virtex-4 SX is successor for Virtex-II and Virtex-4 FX -
for Virtex-II Pro.
Valeri
...
Virtex-4 5V tolerance
Heiko Kalte - 2005-07-15 00:21:00
Hi,
is there any difference between Virtex-II and Virtex-4 5V tolerence? I did
not find any information about that. I want to connect 5V outputs to
Virtex-4 inputs. I read all the articles about 174ohm resistors and
QuickSwitch. Does all that apply to Virtex-4, too?
Regards
Heiko
...virtex-4 power consumption
sunry.zhang@gmail.com - 2007-10-20 00:53:00
Now I have ported a design from virtex-2 to virtex-4,because the
xilinx announced virtex-4 have a lower dynamic power,but actually when
I finished my design,running the same design with virtex-4,the metal
face of the package is hot and this phenomenon is not existed in
virtex-2.Why?Do anybody h...Xilinx Virtex 4 Configuration Frames
lovesinghal@gmail.com - 2005-05-24 04:06:00
Hello All,
I am looking at the reconfiguration capabilities of Virtex 4 devices. I
have following questions related to Xilinx Virtex 4 configuration
frames (frames here refer to the smallest addressable units in Virtex
devices that can be reconfigured):
a). What is the shape and size of a f...FPGA Reconfiguration : Virtex-4 Frames
Andreas Nett - 2005-11-18 04:12:00
Hello everybody,
I'm working on dynamic partial reconfiguration of Xilinx Virtex-II FPGAs. In all Virtex-Device-Families the smallest (re-)configurable unit is a FRAME. I know that in Virtex and Virtex-II, these Frames are running from the top of the device to the bottom. This means that during r...Has anybody run Virtex-4 FPGAs at 300MHz+ interface speed?
azam - 2005-07-06 18:35:00
I was trying to determine the max frequency that can be clocked thru
the Virtex-4 FPGA pins. While referring the Virtex-4 User Guide the (DC
and Switching characteristics) Section of the book has blank columns.
Although the Virtex-4 FPGA Handbook mentions the capabiltiy to meet
different I/O sta...Virtex 5 config Virtex 4
maxascent - 2009-08-22 14:13:00
I want to use a spi config mode for the Virtex 5 and then use a serial
daisy chain to config a Virtex 4. Looking at the V5 user guide I am pretty
sure I can do this but could someone just confirm it?
Thanks
Jon
...Virtex-4 DCM CLKFX jitter
RobJ - 2006-03-09 11:30:00
The data sheet refers you to the Xilinx web site, but I can't find anything
there for Virtex-4. Does the Virtex-II CLKFX jitter calculator also work for
Virtex-4?
Thanks,
Rob
...Fast Serial I/O on Virtex-5
2006-05-29 10:00:00
http://www.xilinx.com/products/silicon_solutions/fpgas/virtex/virtex5/capabilities/index.htm
Looking at Virtex-5 capabilities at Xilinx web site I didn't find
Rocket I/O. Is it gone? Why? Any hope for re-introduction in "Virtex-5
GX" ?
...TI DSP + Virtex-5 using EMIF interface
techG - 2008-06-09 05:24:00
Hi all,
I'm working on a realtime application that requires to elaborate a
digital video stream 25fps. Algorithms are very time consuming and an
hardware parallel solution can help to satisfy time constraints.
Finally I decided for a mixed SW and HW that consists in a TI DSP and
a Virtex-5 co...Virtex 4 configuration frames
Love Singhal - 2005-05-26 05:27:00
Hi,
We have the following questions related to Virtex 4 configuration
frames:
a). What is the shape and size of a frame in Virtex 4 device? In Virtex
2, each frame is contained in one vertical column of the device. But
we could not find any information related to the shape of frame in
Virt...ISE6.1 : using virtex 800
Dave Pedlow - 2004-01-28 06:25:00
I'm trying to create a bit file for a virtex xcv800 using ISE 6.1 but I can't select the virtex family. can I download it of the xilinx site somewhere?
thanks
DAve
...Successful use of MGT on Virtex 4
JarJarJP12 - 2005-11-29 15:41:00
Has anyone been able to successfully simulate a test of the MGT on the
Virtex-4? I've been trying to instantiate the GT11_custom for a while,
and it just does not seem to work. Basically I've instantiated two
MGT's and have tied them together via the RXN/P - TXN/P. I've tried to
use 8B/10B en...Uart core for a virtex-4
Andrew Lohbihler - 2005-11-22 03:08:00
Hi,
I've been using the uart_tx and uart_rx core EDIF's provided by Xilinx in
xapp223. These are great for my Virtex-II development, and they obviously
don't work for the Virtex-4. I like the simplicity of these cores and want
to change as little of my old code as possible. Does anyone know...Transition from Virtex-E to Virtex-II
Emile - 2003-09-25 08:31:00
As we are transitioning from Virtex-E to Virtex-II, we have the
following excess inventory to sell.
XCV2000E-6BG560C
44 at $699/e
XCV2000E-6FG1156C
200 at $649/e
XCV2000E-7FG1156I
29 at $674/e
XCV2000E-8FG1156C
290 at $699/e
XC2V6000-4BF957C (we're migrating to FF1152)
300 at $1...Virtex-4 FPGA with Jbits3.0?
Joelmir Jose Lopes - 2005-02-23 03:07:00
I would like to acquire the Virtex-4, however, I woul
like to know which the tool that could make partial and dynami
reconfigurable with such FPGA.
Did I use JBits for Virtex, however he was not very good, does exist
other tool for the Virtex-4 for partial and dynamic reconfigurabl
this syste...How do I make use of local-clocks in a Virtex-2 FPGA?
Kelvin @ SG - 2004-01-05 00:58:00
Hi, there:
I saw this statement in Virtex-2 datasheet, how do I make use of these local
clocks?
Is there any documents on these local clocks?
Best Regards,
Kelvin
Local Clocking
In addition to global clocks, there are local clock resources
in the Virtex-II devices. There are more t...vertex-II configuration architecture
sudarshan banerjee - 2004-08-12 12:58:00
I have a question about Virtex-II configuration architecture.
Any help/pointers would be greatly appreciated.
Thanks,
Sudarshan problem: according to XAPP 151 (vertex config architecture user's guide), each CLB column in Virtex has 48 frames
So, XC2V2000 (56 rows 48 columns),...Re: Amount of wire and logic
Matthew Hicks - 2007-08-11 20:43:00
Old examples? I wonder what the breakdown is on the number of FPGAs you
ship, Virtex-II Pro vs Virtex-4 vs Virtex-5. Since you aren't shipping all
the Virtex-5s yet, an I still can't find small unit quatities of Virtex-4s,
I bet the Virtex-II Pro is still very relevant.
---Matthew Hicks...Virtex 4 Config
maxascent - 2007-06-13 10:06:00
Hi
Could someone just confirm for me that I can connect the config block to
3.3V in a Virtex 4 device. I have checked the data sheet and it seems to
indicate this. I just want to check as I have been using Virtex 2 Pro
devices which need to be 2.5V.
Jon
...Xilinx Memory Interface Generator
Sean Durkin - 2004-12-03 02:06:00
Hi *,
I noticed that now the Xilinx Memory Interface Generator is available
from http://www.xilinx.com/memory . This should be very useful...
On the page it says "Generate your Virtex-4, Virtex-II Pro and Spartan-3
memory interface", but in fact the tool you can download there only
suppo...Virtex 4 : Configuration-memory readback
Vivian Bessler - 2006-01-17 07:12:00
Hi, I need to perform configuration-memory readback on an active (not shutdown) virtex 4 device.
Does anyone know if on Virtex 4 is it still the case that readback should not be performed on active devices, for frames that are prior to memory element frames? For Virtex 2 and Spartan 3 this can le...Virtex-3 PRO
Manfred Kraus - 2004-02-06 16:16:00
I heard rumours XILINX will announce Virtex-3 later this year,
but a VIRTEX-3 PRO is not planned.
Will FPGAs with integrated Processors share the destiny of the X6200 series
?
...Any Virtex 4 development/prototyping boards out there???
2005-05-11 05:43:00
Hi,
I am looking for a Virtex 4 based FPGA development board with ideally a
PCI Express interface and at least a FX-100 Virtex 4. If anybody knows
of any vendors who have this or are working on this, please let me
know.
Thanks,
Sam.
...How to decode FAR register in Virtex-4?
Bertrand Rousseau - 2006-02-13 08:20:00
Hi everyone,
I'm trying to understand how the frame addresses have to be decoded for
a Virtex-4 FPGA from Xilinx. So far I could find documentation about
the configuration for VI and VII FPGAs, but there seem to be small
modifications between these models frame addresses and the new
Virtex-4....Virtex-4 Routing
Miguel - 2005-04-22 09:39:00
Hi,
I can't seem to find any documentation on Virtex-4 routing, no even a
general schematic, i looked at the datasheets and user guides but
nothing. I saw a answer record that said that there weren't any TBUF's,
and the data sheet shows that there is a switch matrix similar to
Virtex-II in th...JBits 3.0 and Virtex-II Pro
Mahim Mishra - 2004-09-11 17:13:00
Hello all!
I am using Xilinx Virtex-II Pro (XC2VP20 and XC2VP50) chips, and was
wondering if I can use JBits 3.0 to manipulate the configuration
bitstreams for these chips. It seems not, since the JBits "Device"
class seems to only have defined constants for Virtex and Virtex-II
chips. Has a...DRP of the Virtex 5 PLL
Sylvain Munaut - 2007-03-02 21:20:00
Hi every one,
I see the Virtex 5 DLL has a DRP port however I can't find the register description to change it's configuration dynamically. For the virtex 4 that was in the "configuration guide", but looking at the equivalent guide for the virtex 5 I see no document describing the PLL DRP registe...Re: help needed for Virtex-4
Jon Beniston - 2008-07-22 12:44:00
On 22 Jul, 17:41, "saad" wrote:
> Hello All.
> =A0 =A0 =A0 =A0 =A0 Can anyone tell me the Push buttons ,leds names that =
i can write
> in the constraint file for Virtex -4.
> Any code that helps me test the functionality of virtex 4 will be
> appreciated.
Which PCB are you using?
...Virtex-5 clocking
Saul Bernstein - 2008-10-09 13:18:00
Hi Folks,
altough brand new I hope someone already made some experience with Virtex-5.
I just switched from Virtex-4 to Virtex-5 and I must admit that the clock
managment is... and remains... somewhat unclear to me!
It's plain to see that the clock management is handled a bit different...Virtex 4 and reconfigurable computer
=?iso-8859-1?B?R2FMYUt0SWtVc5k=?= - 2005-06-22 14:46:00
Hi!
I would like to know if the Xilinx Virtex 4 offer the possibility of
partially reconfigure bitstreams directly (as in the virtex II using
the jbits library).
If yes ... what are the hardware (requirement for the fpga board) and
software (are the libraries similar to jbits?) requirements ?
...Virtex 4 Multiplier RPM Constraints?
Love Singhal - 2006-02-26 04:53:00
Hi,
I am trying to create a Xilinx Core Generator multiplier for Virtex 4
with RPM constraints. However, neither ISE 7.1 (IPCore 7.1) nor ISE 8.1
(IPCore 8.0) allows creation of Virtex 4 multiplier with RPM
constraints, even if multiplier is completely LUT based. Such
constraints on multiplier ...Amount of wire and logic
Pasacco - 2007-08-10 07:15:00
Dear
Since Xilinx does not report wire utilization and technology data, I
expect that
Given FPGA device family :
(1) There is a constant ratio of INTERCONNECT to LOGIC.
(2) When amount of LOGIC increases N times, amount of INTERCONNECT
increases N times.
For example :
Virtex-II Pro-20 ...Difference among Virtex Families, FPGA Books
rk - 2010-01-07 07:38:00
Hi Folks
I have recently become very interested in FPGA and DSP. Could somebody
suggest to me a newbee started book and also a related experimental board.
I would also like to know the differences between the different Virtex
families like Virtex 2, 4, 5 etc.
Regards
RK
...How to simulate Virtex-4 PPC, MAC, etc. ?
acetylcholinerd@gmail.com - 2005-12-16 11:06:00
Hello! Having finished a board design with a Virtex-4FX and with
promising leads on the silicon, I sat down to begin my HDL coding...
when I discovered that the simulation models for the Virtex-4 PPC and
MAC components are only available in encrypted form. After poking
around a bit on the net an...GT10_PCI_EXPRESS_n
2004-06-28 07:18:00
According to the Xilinx documentation the GT10_PCI_EXPRESS_n primitive
is only "supported for Virtex-II Pro X but not for Virtex-II or
Virtex-II Pro". Does this mean that you can't use the Virtex-II Pro in
a PCI-Express application? Is this related to the electrical idle, or
are there other re...Re: Xilinx or Altera...
Peter Alfke - 2006-05-16 17:51:00
Luc, let me un-confuse you:
I referred to Virtex-4, but why do you ask?
The OP did not specify a device family, and Virtex always outperforms
Spartan.
And Spartan is always lower priced than Virtex.
That's why we have the two different families.
I do not understand the reason for your question...reconfiguration of virtex 2 pro
mani - 2008-03-04 02:27:00
Hi friends
Can u please help me in reconfiguring virtex 2 pro board... Pls
give an example and steps to reconfigure virtex 2 pro.. I am using
Xilinx 8.2 i version software.. If u have some codes please send it
and help me in working out reconfiguration in Virtex 2 pro ...
More o...Virtex II Pro, powerpc 405 and ucOSII
Mancini Stephane - 2004-01-22 08:41:00
Hi,
Is there anybody ou there who tried to run the real time OS ucOSII on a
virtex II platform ?
Have you tried different OS ?
I know that some Virtex II Pro kits comes with Linux as embedded OS but
I'm wondering if it's not too heavy for fast real time systems with
dedicated hardware parts (s...LVPECL_33 to LVPECL_25 (virtex-II pro)
jicho - 2003-12-26 02:06:00
Dear all,
I am trying to use differential LVPECL interface on Xilinx virtex-II pro
device.
I have to connect some standard LVPECL(3.3V) signal to virtex-II pro device.
But I know that Virtex-II Pro devices support only LVDS_25 and LVPECL_25.
There is no problem with Spartan-IIE or Virtex-II...