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Comp.Arch.FPGA | FPGA vs CPLD

There are 15 messages in this thread.

You are currently looking at messages 0 to 10.

FPGA vs CPLD - praveen - 2004-07-28 09:57:00

Hello,
What is the differences between FPGA and CPLD?

What basis on which i should select. whether to go for cpld or fpga?

waiting for  reply
with regards
praveen
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Re: FPGA vs CPLD - Leon Heller - 2004-07-28 10:48:00

"praveen"
<p...@rediffmail.com> wrote in message
news:f...@posting.google.com...
> Hello,
> What is the differences between FPGA and CPLD?
>
> What basis on which i should select. whether to go for cpld or fpga?

It's getting very blurred. Altera's new CPLD, the MAX II, is really an FPGA,
apparently.

Leon


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Re: FPGA vs CPLD - General Schvantzkoph - 2004-07-28 10:53:00

On Wed, 28 Jul 2004 06:57:51 -0700, praveen
wrote:

> Hello,
> What is the differences between FPGA and CPLD?
> 
> What basis on which i should select. whether to go for cpld or fpga?
> 
> waiting for  reply
> with regards
> praveen

Is this a serious question? The internal architectures are very different,
go download the architecture documents from the Xilinx site. From an
application standpoint FPGAs are much much bigger than CPLDs. CPLDs are
used for very simple glue logic applications, they are cheap and
nonvolatile. FPGAs can implement very complex systems, but they are more
expensive on a per package basis although they are much cheaper on a per
gate basis. FPGAs require some support logic to initialize them, either a
serial prom or an interface to a CPU (frequently implemented with a CPLD). 
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Re: FPGA vs CPLD - Rene Tschaggelar - 2004-07-28 12:37:00

praveen wrote:

> Hello,
> What is the differences between FPGA and CPLD?
> 
> What basis on which i should select. whether to go for cpld or fpga?

The common understanding is that CPLDs are EEPOM or Flash based
and have to be programmed once. They have up to say 512 Flipflops.
FPGAs on the other hand are RAM based, meaning they have to be 
programmed at every powerup. This usually happens with a small
external Flash, a CPU or whatever. The smallest FPFA is far bigger
than the biggest CPLD.

Hope that helps.

Rene
-- 
Ing.Buero R.Tschaggelar - http://www.ibrtses.com
& commercial newsgroups - http://www.talkto.net
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Re: FPGA vs CPLD - Linnix - 2004-07-28 15:18:00

p...@rediffmail.com (praveen) wrote
in message news:<f...@posting.google.com>...
> Hello,
> What is the differences between FPGA and CPLD?

General logics vs. Simple reg/decoder
Expensive ($10 - $20) vs. Cheap ($1 - $2)
Big (> 100 pins) vs. Small (> 44 pins)

...
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Re: FPGA vs CPLD - Jim Granville - 2004-07-28 20:10:00

praveen wrote:
> Hello,
> What is the differences between FPGA and CPLD?
> 
> What basis on which i should select. whether to go for cpld or fpga?

10 years ago, things were relatively simple :
  FPGA's were pretty much all RAM/loader designs, with low power,
and granular logic.
  CPLDs were were higher power, fast with wide-logic terms, and
limited in register count.

  These days, there is much more overlap and bluring of the lines.

# Some FPGAs are FLASH (Lattice, Actel)
# Some CPLDs have granular logic ( MAX II )
# Some CPLDs have RAM/Loader built in ( MAX II, Coolrunner... )
# For lowest static power, modern CPLDs are << modern FPGA

The first point of selection would be the register count, then
the logic/RAM/DSP considerations.

You could, in some cases, design with both ( or use uC + FPGA )
to solve all the design problems.

-jg

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Re: FPGA vs CPLD - Matt North - 2004-07-29 03:25:00

How about an FPGA which looks like a CPLD (in
programming terms)
No boot prom or external logic, instead this has internal eeprom.

http://www.latticesemi.com/products/fpga/xpga/index.cfm




Re: FPGA vs CPLD - Mario Trams - 2004-07-29 06:30:00

praveen wrote:

> Hello,
> What is the differences between FPGA and CPLD?
> 
> What basis on which i should select. whether to go for cpld or fpga?
> 

CPLDs are most often used for less datapath intensive timing-critical
designs (i.e. more control-path like stuff), while FPGAs are fine 
for highly datapath intensive designs.

FPGAs are rather easily scalable. That is, they have a structure 
comparable to US-like (i.e. "constructed") cities. You have a very
regular grid with buildings (i.e. logic blocks) as well as horizontal
and vertical streets (i.e. the connections). You can easily extend
the structure at the borders.

CPLDs have a completely different structure. Mostly, there is a 
centralized connection structure and the logic elements are grouped
around it. Thus, the analogy is something like a farm. You can 
recognize easily that such a design does not scale very well. 
Because of that, the CPLDs have a rather small capacity when 
compared to FPGAs. However, they have the big advantage of a 
predictably fast interconnection. I.e. it does not matter where
the logic elements are positioned - the delay of the connections
between them is almost the same. This is not the case for FPGAs.
There, the farther the elements are away from each other, the 
higher the delay. 

Besides this difference, CPLDs have mostly much more powerful
logic elements than FPGAs. This also attributes to the use 
of CPLDs especially for control paths.

Another difference that has been already cited by others is 
typically the non-volatile nature of CPLDs and the volatile
nature of FPGAs. 

Regards,
Mario 
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Re: FPGA vs CPLD - Thomas Stanka - 2004-07-29 07:53:00

m...@linnix.info-for.us (Linnix) wrote:
> p...@rediffmail.com (praveen) wrote in message
news:<f...@posting.google.com>...
> > Hello,
> > What is the differences between FPGA and CPLD?
> 
> General logics vs. Simple reg/decoder
> Expensive ($10 - $20) vs. Cheap ($1 - $2)
> Big (> 100 pins) vs. Small (> 44 pins)

I use Fpgas in 84cqfp while I have just read, that Altera ships its
new MaxII CPLD in up to 324 pin BGA.
I think the first point ist the best way to differ between CPLD and
Fpga.

bye Thomas

Re: FPGA vs CPLD - Thomas Stanka - 2004-07-29 08:09:00

Rene Tschaggelar <n...@none.net> wrote:
> praveen wrote:
> > What is the differences between FPGA and CPLD?
>
> The common understanding is that CPLDs are EEPOM or Flash based
> and have to be programmed once. They have up to say 512 Flipflops.
> FPGAs on the other hand are RAM based, meaning they have to be 
> programmed at every powerup. This usually happens with a small
> external Flash, a CPU or whatever. The smallest FPFA is far bigger
> than the biggest CPLD.

That's pretty wrong. Actel has flashbased Fpgas (and antifuse based).

The main difference is that CPLDs are mainly focused on 
Input->(fast)Logic->Register->Output
while Fpgas are typically slower for CPLD tasks, but have more
configuration possibillities and support more complex logic
structures.
A typical CPLD design would have fast but simple operations while a
fpga has complex operations based on many internal registers.

bye Thomas

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