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Comp.Arch.FPGA | Request for 28 BIT ADDER maximum clock rates for Vertex II FPGAs
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Request for 28 BIT ADDER maximum clock rates for Vertex II FPGAs - Bill Hanna - 2004-08-11 18:14:00
Has anyone tested 28 BIT ADDERS in Vertex II for maximum clock rate thru the ripple carry chain? I have an application That requires a maximum clock frequency of 80 MHz. Thanks, Bill
Re: Request for 28 BIT ADDER maximum clock rates for Virtex II FPGAs - John_H - 2004-08-11 18:26:00
80 MHz is extremely slow and easily achieved in any FPGA introduced in the last several years. I would expect that 200 MHz is easy in the slowest speed grade of Virtex-II but I haven't bothered to run the numbers. "Bill Hanna" <b...@aol.com> wrote in message news:9...@posting.google.com... > Has anyone tested 28 BIT ADDERS in Vertex II for maximum clock rate > thru the ripple carry chain? I have an application That requires a > maximum clock frequency of 80 MHz. > > Thanks, > Bill______________________________
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