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Comp.Arch.FPGA | Xilinx - Proper VHDL for Bidirectional Pins

There are 2 messages in this thread.

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Xilinx - Proper VHDL for Bidirectional Pins - Brad Smallridge - 2004-08-23 13:29:00

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What is the proper VHDL code for bidirectional pins on a Xilinx chip?
I used the code below but the chip runs hot.


SRAM_BIDIRECTIONAL_PINS:process(SRAM_W_SIGNAL_5,SRAM_DQA_SIGNAL_5,SRAM_DQ=
B_SIGNAL_5 )
begin
 if(SRAM_W_SIGNAL_5 =3D '1') then
  SRAMDQA <=3D SRAM_DQA_SIGNAL_5;
  SRAMDQB <=3D SRAM_DQB_SIGNAL_5;
 else
  SRAMDQA <=3D (others =3D> 'Z');
  SRAMDQB <=3D (others =3D> 'Z');
 end if;
end process;

Thanks,

Brad

b  r  a  d  @  a  i  v  i  s  i  o  n  .  c  o  m 
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 6.00.2800.1400" name=3DGENERATOR>
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<BODY>
<DIV><FONT face=3D"Courier New">What is the proper VHDL code=20
for&nbsp;bidirectional pins on a Xilinx chip?</FONT></DIV>
<DIV><FONT face=3D"Courier New">I used the code below
but&nbsp;the chip=20
runs&nbsp;hot.</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT=20
face=3D"Courier =
New">SRAM_BIDIRECTIONAL_PINS:process(SRAM_W_SIGNAL_5,SRAM_DQA_SIGNAL_5,SR=
AM_DQB_SIGNAL_5=20
)<BR>begin<BR>&nbsp;if(SRAM_W_SIGNAL_5 =3D '1') =
then<BR>&nbsp;&nbsp;SRAMDQA &lt;=3D=20
SRAM_DQA_SIGNAL_5;<BR>&nbsp;&nbsp;SRAMDQB &lt;=3D=20
SRAM_DQB_SIGNAL_5;<BR>&nbsp;else<BR>&nbsp;&nbsp;SRAMDQA
&lt;=3D (others =
=3D&gt;=20
'Z');<BR>&nbsp;&nbsp;SRAMDQB &lt;=3D (others =3D&gt;
'Z');<BR>&nbsp;end =
if;<BR>end=20
process;<BR></FONT></DIV>
<DIV><FONT face=3D"Courier New">Thanks,</FONT></DIV>
<DIV><FONT face=3D"Courier New"></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New"><FONT face=3DArial =
size=3D2>Brad</FONT></FONT></DIV>
<DIV><FONT face=3D"Courier New"><FONT face=3DArial =
size=3D2></FONT></FONT>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New"><FONT face=3DArial size=3D2>b
=
&nbsp;r&nbsp; a&nbsp;=20
d&nbsp; @ &nbsp;a&nbsp; i &nbsp;v &nbsp;i&nbsp; s
&nbsp;i&nbsp; o =
&nbsp;n&nbsp;=20
.&nbsp; c &nbsp;o &nbsp;m
</FONT></DIV></FONT></BODY></HTML>

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Re: Xilinx - Proper VHDL for Bidirectional Pins - Inquiring Guy - 2004-08-23 20:29:00

You should use tri-state buffers.

SRAMDQA <= SRAM DQA SIGNAL 5 when (SRAM W SIGNAL 5 = '1') else (others => 'Z');

x <= SRAMDQA;
and so on.

x -------------------------|
                           |
                      |\   |
SRAMDQASIGNAL5 -------| \__|_______________ SRAMDQA
                      | /
                      |/|
                        |
SRAMWSIGNAL5 -----------|

"Brad Smallridge" <b...@dslextreme.com> wrote in message
news:<1...@corp.supernews.com>...
> What is the proper VHDL code for bidirectional pins on a Xilinx chip?
> I used the code below but the chip runs hot.
> 
> 
> SRAM BIDIRECTIONAL PINS:process(SRAM W SIGNAL 5,SRAM DQA SIGNAL 5,SRAM DQ
> B SIGNAL 5 )
> begin
>  if(SRAM W SIGNAL 5 = '1') then
>   SRAMDQA <= SRAM DQA SIGNAL 5;
>   SRAMDQB <= SRAM DQB SIGNAL 5;
>  else
>   SRAMDQA <= (others => 'Z');
>   SRAMDQB <= (others => 'Z');
>  end if;
> end process;
> 
> Thanks,
> 
> Brad
> 
> b  r  a  d  @  a  i  v  i  s  i  o  n  .  c  o  m 
> --
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