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Comp.Arch.FPGA | does ISE 6.3 improve timing vs. ISE 6.2 ?
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does ISE 6.3 improve timing vs. ISE 6.2 ? - Nahum Barnea - 2004-10-04 04:09:00
Hi. I am using ISE 6.2 for xc2vp30,-6 that compiles for 100 MHz. Now I am trying to stretch the design to 133 MHz. Can anyone compare the performance improvement of ISE 6.3 vs. ISE 6.2 (if any) ? THANKX
Re: does ISE 6.3 improve timing vs. ISE 6.2 ? - Marc Randolph - 2004-10-04 07:10:00
Nahum Barnea wrote:
> Hi.
>
> I am using ISE 6.2 for xc2vp30,-6 that compiles for 100 MHz.
> Now I am trying to stretch the design to 133 MHz.
>
> Can anyone compare the performance improvement of ISE 6.3 vs. ISE 6.2 (if any) ?
Howdy Nahum,
I recently switched from 6.2.3i to 6.3.1i and did not notice any
performance increase. In fact, performance actually went down slightly
until I tweaked some project settings.
Having said that, there are timing related bug fixes in 6.3.1i,
including one I was running into previously: falling edge to falling
edge wasn't timed properly. Who knows what else was fixed, so it might
be worthwhile to upgrade. We always keep previous versions installed
anyway, so switching back and forth shouldn't be a problem.
My design is a 2VP40-5 in which a total of 82% of all LUTs are used,
over half of which run at 155 MHz and the remainder run at 125 MHz.
Assuming the design you are working with is pipelined, 133 MHz should
not be too difficult to meet in a -6 part unless it is really full.
Good luck,
Marc