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Comp.Arch.FPGA | Recover FPGA Verilog or VHDL source from .SOF file

There are 5 messages in this thread.

You are currently looking at messages 0 to 5.

Recover FPGA Verilog or VHDL source from .SOF file - highwayismyway - 2005-01-02 23:10:00

I realize that this might not be appropriate
question for this group,
but considering the level of knowledge I thought I would see if anyone
knows much about recovering lost verilog code from a .sof altera
Quartus FPGA binary?  Some of the my companies IP cores source has
disappeared and thought maybe someone here could help me out at
recovering the missing source.  Does anyone know of any altera
dissassembler or decompiler for the SOF file?  I'm not particularly
concerned if the the output is VHDL, verilog, or even AHDL.  Because of
the ethics of reverse engineering I would be willing to present anyone
with the evidence they might need to verify that my company has all
copyrights and ownership of the .sof Im asking to derive the source
code.  Any thoughts how I can do this?

Mark S.

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Re: Recover FPGA Verilog or VHDL source from .SOF file - Mike Treseler - 2005-01-03 10:02:00

highwayismyway wrote:

> Some of the my companies IP cores source has
> disappeared and thought maybe someone here could help me out at
> recovering the missing source.  Does anyone know of any altera
> dissassembler or decompiler for the SOF file?  I'm not particularly
> concerned if the the output is VHDL, verilog, or even AHDL.

It is possible to recover a primitive netlist
of the entire design. However, picking out IP
cores for reuse is not possible.

This situation illustrates the downside of keeping
source code on a single machine.

A disk drive drive can die or take to the highway
at any time without advance notice.

        -- Mike Treseler
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Re: Recover FPGA Verilog or VHDL source from .SOF file - Jim Lewis - 2005-01-03 11:28:00

Mark,
If you still have a simulation library for it,
you might find it in one form or another in
there.  For modelsim, these are typically
a directory named work.

Cheers,
Jim

> I realize that this might not be appropriate question for this group,
> but considering the level of knowledge I thought I would see if anyone
> knows much about recovering lost verilog code from a .sof altera
> Quartus FPGA binary?  Some of the my companies IP cores source has
> disappeared and thought maybe someone here could help me out at
> recovering the missing source.  Does anyone know of any altera
> dissassembler or decompiler for the SOF file?  I'm not particularly
> concerned if the the output is VHDL, verilog, or even AHDL.  Because of
> the ethics of reverse engineering I would be willing to present anyone
> with the evidence they might need to verify that my company has all
> copyrights and ownership of the .sof Im asking to derive the source
> code.  Any thoughts how I can do this?
> 
> Mark S.
> 


-- 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jim Lewis
Director of Training             mailto:J...@SynthWorks.com
SynthWorks Design Inc.           http://www.SynthWorks.com
1-503-590-4787

Expert VHDL Training for Hardware Design and Verification
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Re: Recover FPGA Verilog or VHDL source from .SOF file - rcarlson - 2005-01-03 13:29:00

I have done this many times as a contract for
other companies that have
lost Verilog, VHDL, or AHDL source code.  Its quite common to have a
.sof in control from manufacturing and missing the source code.  For
example, if the designer leaves a company and his desktop is lost or
changed by IT or if the designer's hard drive has a sudden death and is
not under control or backed up.  The end result of my disassembling /
decompiling the FPGA binary will be much better than a netlist as it
will be readable (.v), (.vhdl) .  I usually charge anywhere from $3,000
to $7,000 US dollars for the time required in reobtaining the source
code depending on the type of FPGA and the amount of LUTS used.  I can
usually have the source within a time frame of 2 weeks to a month
depending on my schedule at the time.

If you would like me to give you a quote on recovering your source code
you can send me an email at:

rcarlson "|AT|" @ skytekinc. "|DOT| " com  <=====My correct email
is
without the spaces and "|AT|" and "|DOT|" quotes above.  This is to
prevent the spammers from getting my correct email by parsing the
messages on this board.

Rod Carlson
Senior Hardware Engineer
Sky Tek Inc.

> I realize that this might not be appropriate question for this group,
> but considering the level of knowledge I thought I would see if
anyone
> knows much about recovering lost verilog code from a .sof altera
> Quartus FPGA binary? Some of the my companies IP cores source has
> disappeared and thought maybe someone here could help me out at
> recovering the missing source. Does anyone know of any altera
> dissassembler or decompiler for the SOF file? I'm not particularly
> concerned if the the output is VHDL, verilog, or even AHDL. Because
of
> the ethics of reverse engineering I would be willing to present
anyone
> with the evidence they might need to verify that my company has all
> copyrights and ownership of the .sof Im asking to derive the source
> code. Any thoughts how I can do this?

> Mark S.

______________________________
Join the blogging team on FPGARelated.com and earn rewards! Details Here.

Searching rod carlson - mmmniple - 2010-02-15 17:08:00

Hi.I know this thead is older,but i am searching
rod carlson,which postedthis .

if you read it,could contact me?

I have send mail this direction,but it seems is out.

a lot of thanks



>I have done this many times as a contract for other companies that have
>lost Verilog, VHDL, or AHDL source code.  Its quite common to have a
>.sof in control from manufacturing and missing the source code.  For
>example, if the designer leaves a company and his desktop is lost or
>changed by IT or if the designer's hard drive has a sudden death and is
>not under control or backed up.  The end result of my disassembling /
>decompiling the FPGA binary will be much better than a netlist as it
>will be readable (.v), (.vhdl) .  I usually charge anywhere from $3,000
>to $7,000 US dollars for the time required in reobtaining the source
>code depending on the type of FPGA and the amount of LUTS used.  I can
>usually have the source within a time frame of 2 weeks to a month
>depending on my schedule at the time.
>
>If you would like me to give you a quote on recovering your source code
>you can send me an email at:
>
>rcarlson "|AT|" @ skytekinc. "|DOT| " com  <=====My correct
email is
>without the spaces and "|AT|" and "|DOT|" quotes above.  This is
to
>prevent the spammers from getting my correct email by parsing the
>messages on this board.
>
>Rod Carlson
>Senior Hardware Engineer
>Sky Tek Inc.
>


	   
					
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