Sign in

username:

password:



Not a member?

Search Comp.Arch.FPGA



Search tips

fpga by Keywords

Altera | ASIC | CPLD | Cyclone | DCM | DDR | DSP | Ethernet | ISE | JTAG | Linux | LVDS | Microblaze | ML310 | Modelsim | NIOS | OPB | PCI | Quartus | RocketIO | SDRAM | Spartan | Spartan3 | SRAM | Stratix | Verilog | VHDL | Virtex | Virtex-4 | Virtex-II | Xilinx | XST


Ads

See Also

DSPEmbedded SystemsElectronics

Comp.Arch.FPGA | MicroBlaze size

There are 6 messages in this thread.

You are currently looking at messages 0 to 6.

MicroBlaze size - Jon Beniston - 2003-10-02 18:05:00

Xilinx's MicroBlaze CPU is listed as requiring
950 LUTs. Does this
include the register file, or does that use a block RAM?

Cheers,
JonB



Re: MicroBlaze size - Goran Bilski - 2003-10-03 02:13:00

Hi,

The register file is included in that number.

Göran

Jon Beniston wrote:

>Xilinx's MicroBlaze CPU is listed as requiring 950 LUTs. Does this
>include the register file, or does that use a block RAM?
>
>Cheers,
>JonB
>  
>
______________________________
Join the blogging team on FPGARelated.com and earn rewards! Details Here.

Re: MicroBlaze size - Jon Beniston - 2003-10-03 12:31:00

Goran Bilski <g...@xilinx.com> wrote in
message news:<blj44a$h...@cliff.xsj.xilinx.com>...
> Hi,
> 
> The register file is included in that number.
> 
> Göran

Thanks. One other question, is it a pure RTL design or does it
instantiate Xilinx specific primitives? Ditto for NIOS?

Cheers,
Jon

Re: MicroBlaze size - Goran Bilski - 2003-10-06 03:05:00

Hi,

The version that is shipped with EDK instanciate Xilinx primitives.
But there exists a pure RTL version of MicroBlaze which can be purchased 
as source code.

Göran

Jon Beniston wrote:

>Goran Bilski <g...@xilinx.com> wrote in message
news:<blj44a$h...@cliff.xsj.xilinx.com>...
>  
>
>>Hi,
>>
>>The register file is included in that number.
>>
>>Göran
>>    
>>
>
>Thanks. One other question, is it a pure RTL design or does it
>instantiate Xilinx specific primitives? Ditto for NIOS?
>
>Cheers,
>Jon
>  
>
______________________________
Join the blogging team on FPGARelated.com and earn rewards! Details Here.

Re: MicroBlaze size - Antti Lukats - 2003-10-06 08:34:00

j...@beniston.com (Jon Beniston) wrote in message
news:<e...@posting.google.com>...
> Goran Bilski <g...@xilinx.com> wrote in message
news:<blj44a$h...@cliff.xsj.xilinx.com>...
> > Hi,
> > 
> > The register file is included in that number.
> > 
> > Göran
> 
> Thanks. One other question, is it a pure RTL design or does it
> instantiate Xilinx specific primitives? Ditto for NIOS?

it is 99.99 xilinx stuff inside, and its all encrypted files so you cant
even see whats inside.

NIOS is on demand generated by a large PERL framework called Europe,
get Alter EPP (Embedded Processor Portfolio) and dig into the PERL
sources if interested in deepinfo :)

antti
______________________________
Join the blogging team on FPGARelated.com and earn rewards! Details Here.

Re: MicroBlaze size - Jesse Kempa - 2003-10-06 12:07:00

> 
> Thanks. One other question, is it a pure RTL design or does it
> instantiate Xilinx specific primitives? Ditto for NIOS?
> 
> Cheers,
> Jon

Jon,

The Nios RTL does instantiate Altera-specific primitives for things
such as multiplication and on-chip memory (for register files, FIFOs,
etc.)... with Nios you get the RTL source code for free, but the
licensing agreement specifically states that the RTL is for use in
Altera devices only (although ASIC licensing is an option).

Jesse Kempa
Altera Corp.
jkempa at altera dot com
______________________________
Join the blogging team on FPGARelated.com and earn rewards! Details Here.