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Comp.Arch.FPGA | systemc to verilog translator v0.5
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systemc to verilog translator v0.5 - Javier Castillo - 2005-10-10 08:01:00
Hello, We have released the version 0.5 of the SystemC to Verilog Synthesizable Subset Translator, wich includes support for structures translation from SystemC to Verilog. You can download it from http://www.opencores.org/projects.cgi/web/sc2v/overview Javier Castillo______________________________
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