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HiI need to use more than 8 global buffer in a virtex II design.I know that VirtexII supports up to 16 Global Buffer divided in moreclock regions, but ISE PAR doesn't automatically divide project intwo (or more) clock region and it uses only 8 global buffer. How canI use the other global buffer?______________________________
You need to manually instantiate BUFG or BUFGMUX operators. The tools are not going to infer more than 8 because there is only 8 global clock connections. To use more than 8 you have to limit the connections on some of them to one quadrant of the chip. Use the -timing parameter on the mapper to place them or manually locate them yourself -- something you will likely have to do anyway. When you manually instantiate them make sure that some of them are only connected to objects in their quadrant of the chip.