Hello!

While working with a MAC-FIR I came across an equation in Xilinx'
DSP-book (http://www.xilinx.com/publications/books/dsp/dsp-book.pdf)
which seems to be wrong in my eyes.

On page 65 equation 4.4 for the generic saturation level says
Output width = ceil(log2(2^(b-1)*2^(c-1)*N))+1
Where b/c are the numbers of data/coefficient bits and N is the filter
length.

This formula is, apart from a missing parenthesis, ok, but the next one
for known coefficients says
Output width = ceil(log2(2^(b-1)*abs(sum(coef))*N))+1

Again missing right parenthesis and the N is in my eyes wrong, because
it is already included in the sum of coefficients. Could anyone approve
this? I have to cite this paper in a thesis in lack of another source
for this equation (though it seems to be obvious, but I have to be sure).

Thanks,
Holger

On Sat, 14 Jan 2006 23:00:05 +0100, Holger Blum
<u...@kennsch.net>
wrote:

>Hello!
>
>While working with a MAC-FIR I came across an equation in Xilinx'
>DSP-book (http://www.xilinx.com/publications/books/dsp/dsp-book.pdf)
>which seems to be wrong in my eyes.
>
>On page 65 equation 4.4 for the generic saturation level says
>Output width = ceil(log2(2^(b-1)*2^(c-1)*N))+1
>Where b/c are the numbers of data/coefficient bits and N is the filter
>length.
>
>This formula is, apart from a missing parenthesis, ok, but the next one
>for known coefficients says
>Output width = ceil(log2(2^(b-1)*abs(sum(coef))*N))+1
>
>Again missing right parenthesis and the N is in my eyes wrong, because
>it is already included in the sum of coefficients. Could anyone approve
>this? I have to cite this paper in a thesis in lack of another source
>for this equation (though it seems to be obvious, but I have to be sure).

The coefficients can be both positive and negative, and (for a unity
gain filter) will typically sum to 1, not N.

Incidentally, counting the parentheses, I make it 5x( and 5x) in the
above equation; where is the missing one?

- Brian

Hello Brian!

Brian Drummond wrote:

> On Sat, 14 Jan 2006 23:00:05 +0100, Holger Blum <u...@kennsch.net>
> wrote:
> 
> 
>>Hello!
>>
>>While working with a MAC-FIR I came across an equation in Xilinx'
>>DSP-book (http://www.xilinx.com/publications/books/dsp/dsp-book.pdf)
>>which seems to be wrong in my eyes.
>>
>>On page 65 equation 4.4 for the generic saturation level says
>>Output width = ceil(log2(2^(b-1)*2^(c-1)*N))+1
>>Where b/c are the numbers of data/coefficient bits and N is the filter
>>length.
>>
>>This formula is, apart from a missing parenthesis, ok, but the next one
>>for known coefficients says
>>Output width = ceil(log2(2^(b-1)*abs(sum(coef))*N))+1
>>
>>Again missing right parenthesis and the N is in my eyes wrong, because
>>it is already included in the sum of coefficients. Could anyone approve
>>this? I have to cite this paper in a thesis in lack of another source
>>for this equation (though it seems to be obvious, but I have to be sure).
> 
> 
> The coefficients can be both positive and negative, and (for a unity
> gain filter) will typically sum to 1, not N.

I know. But this formula uses already scaled and quantized coefficients,
so they sum up to a much higher number which then can be taken to
determine the actual width of the output signal (for a DC input signal).
In my design I have achieved unity gain by scaling the coefficients for
an integer number of used bits and picking the desired active bits from
the full-precision output. I am new to DSP on FPGA, but I think, that
this is the right way.

> Incidentally, counting the parentheses, I make it 5x( and 5x) in the
> above equation; where is the missing one?

I felt so free to correct these mistakes. In the .pdf you could see the
wrong equation.

Regards,
Holger

On Wed, 25 Jan 2006 17:14:49 +0100, Holger Blum
<u...@kennsch.net>
wrote:

>Hello Brian!
>
>Brian Drummond wrote:
>
>> On Sat, 14 Jan 2006 23:00:05 +0100, Holger Blum <u...@kennsch.net>
>> wrote:

>>>This formula is, apart from a missing parenthesis, ok, but the next one
>>>for known coefficients says
>>>Output width = ceil(log2(2^(b-1)*abs(sum(coef))*N))+1
>>>
>>>Again missing right parenthesis and the N is in my eyes wrong, because
>>>it is already included in the sum of coefficients. Could anyone approve
>>>this? I have to cite this paper in a thesis in lack of another source
>>>for this equation (though it seems to be obvious, but I have to be sure).
>> 
>> 
>> The coefficients can be both positive and negative, and (for a unity
>> gain filter) will typically sum to 1, not N.
>
>I know. But this formula uses already scaled and quantized coefficients,
>so they sum up to a much higher number which then can be taken to
>determine the actual width of the output signal (for a DC input signal).

If the "much higher number" happens to be a power of 2, this is normal -
simply scale the result to unity by selecting bits (effectively a
shift). It is equivalent to moving the location of the decimal point
(actually binary point).

>In my design I have achieved unity gain by scaling the coefficients for
>an integer number of used bits and picking the desired active bits from
>the full-precision output. I am new to DSP on FPGA, but I think, that
>this is the right way.

It sounds as though you understand the issues; if your simulations work,
that confirms it.

- Brian