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Comp.Arch.FPGA | Virtex-4 RocketIO and G.709 OTU-2

There are 15 messages in this thread.

You are currently looking at messages 10 to 15.

Re: Virtex-4 RocketIO and G.709 OTU-2 - CsquaredPhD - 2006-04-07 04:13:00

I have seen that note as well, but I don't
understand it.

Can someone explain what "Payload compatible only" means?
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Re: Virtex-4 RocketIO and G.709 OTU-2 - Gerhard Hoffmann - 2006-04-07 10:50:00

On Wed, 22 Mar 2006 12:00:26 +1100, Allan
Herriman <a...@hotmail.com> wrote:

>On 21 Mar 2006 09:08:21 -0800, "Alain" <n...@yahoo.fr> wrote:
>
>>Unfortunately, even OC-192 is excluded form Virtex- 4 (ug076.pdf :
>>"Payload compatible only"), so no hope for OTU-2 I think.
>>We have to wait Virtex-5 family ?
>
>No.  That is unlikely to have sufficient jitter performance, due to
>certain compromises that must be made when putting an MGT on an FPGA.
>In particular, it's likely to use a ring oscillator rather than an LC
>oscillator which would have better perfomance.

Is jitter the only limitation? Most fiber optic transceivers (XFP & friends)
have eye openers of their own and resynchronize everything anyway.

regards, Gerhard
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Re: Virtex-4 RocketIO and G.709 OTU-2 - mike_la_jolla - 2006-04-07 22:16:00

The -11X speed grade is dead as of this week.  Do
this some other way.

Re: Virtex-4 RocketIO and G.709 OTU-2 - =?iso-8859-1?B?R2FMYUt0SWtVc5k=?= - 2006-04-08 03:37:00

I didn't see this info on Xilinx's site! Is it
official?
On the last Virtex-4 datasheet (ds302) the speed grade -12x disapeared
but not the -11x!

mike_la_jolla wrote:
> The -11X speed grade is dead as of this week.  Do this some other way.

Re: Virtex-4 RocketIO and G.709 OTU-2 - Allan Herriman - 2006-04-09 10:31:00

On Fri, 07 Apr 2006 16:50:08 +0200, Gerhard
Hoffmann
<d...@freenet.de> wrote:

>On Wed, 22 Mar 2006 12:00:26 +1100, Allan Herriman <a...@hotmail.com>
wrote:
>
>>On 21 Mar 2006 09:08:21 -0800, "Alain" <n...@yahoo.fr>
wrote:
>>
>>>Unfortunately, even OC-192 is excluded form Virtex- 4 (ug076.pdf :
>>>"Payload compatible only"), so no hope for OTU-2 I think.
>>>We have to wait Virtex-5 family ?
>>
>>No.  That is unlikely to have sufficient jitter performance, due to
>>certain compromises that must be made when putting an MGT on an FPGA.
>>In particular, it's likely to use a ring oscillator rather than an LC
>>oscillator which would have better perfomance.
>
>Is jitter the only limitation? Most fiber optic transceivers (XFP & friends)
>have eye openers of their own and resynchronize everything anyway.

An XFP will have a JTF bandwidth in the order of 1MHz.  A SERDES will
have a JTF bandwidth of 1-2 orders of magnitude less than that, so
resynchronisation in the XFP doesn't solve all the jitter problems.

Regards,
Allan

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