-Ive tried unchecking the
EQUIVALENT_REGISTER_REMOVAL property in xilinx 
specific options,
-Ive tried the KEEP attribute
-Ive tried BOTH at the same time
-Ive tried portmapping to FDCE
-Ive verified that the xst file contains -EQUIVALENT_REGISTER_REMOVAL NO,
-Ive tried googling on this issue with little success
-Ive tried ALOT of other things,

...still the XST removes equivalent registers..

Im using spartan3 fpga and wasted 2 days now trying to find how to stop xst 
from bothering me.
Any help out here?

Thanks..

Btw.. I should tell you how I know its the xst
doing this:
I look at the post-synthesis simulation model..

I posted on here a few hours ago but haven't seen
the response so I'll
try again. My theory is that if you are relying on the mapper to swap
out TBUFs for logic, that somehow messes with the register removal. I
think this option has some issues anyway; using it you think you're
optimizing when really you're shooting yourself in the foot because it
doesn't leave enough registers for the IOBs. I'm just grateful Xilinx
is finally starting to migrate the optimization to the mapper state --
the place where things like IOB register needs can be considered.

I don't think I can help with your problem, but
I'm happy to complain
about the option along with you ;-). I've seen the same problem with
registers left in there for output IOBs being removed. It seems that
the option fixes some of the removal but not all of it because my
output files definitely have more registers when the removal is
disabled. You turn it on thinking that it will optimize your code, and
then you are left without sufficient registers to put one in each IOB.
Hence, your OFFSET timing all fails and you wonder what the heck
happened. I think this optimization should happen after the mapping. I
was grateful that Xilinx is finally realizing the fact that most
optimizations should happen in the mapper.

Perhaps some other XST option overrides some of the removal or makes
the registers unusable in the IOB, such as the optimize for speed
parameter. Here is my option set that is removing more than I think it
should or at least not allowing IOB USE.

set -tmpdir ./xst/projnav.tmp
set -xsthdpdir ./xst
run
-ifn ql5064_interface.prj
-ifmt mixed
-ofn ql5064_interface
-ofmt NGC
-p xc4vlx100-10-ff1513
-top ql5064_interface
-opt_mode Speed
-opt_level 2
-iuc NO
-lso ql5064_interface.lso
-keep_hierarchy SOFT
-rtlview Yes
-glob_opt AllClockNets
-read_cores YES
-write_timing_constraints NO
-cross_clock_analysis NO
-hierarchy_separator /
-bus_delimiter <>
-case maintain
-slice_utilization_ratio 100
-dsp_utilization_ratio 100
-verilog2001 YES
-fsm_extract YES -fsm_encoding Auto
-safe_implementation Yes
-fsm_style lut
-ram_extract Yes
-ram_style Auto
-rom_extract Yes
-mux_style Auto
-decoder_extract YES
-priority_extract YES
-shreg_extract YES
-shift_extract YES
-xor_collapse YES
-rom_style Auto
-mux_extract YES
-resource_sharing YES
-use_dsp48 auto
-iobuf NO
-max_fanout 10000
-bufg 32
-bufr 48
-register_duplication YES
-register_balancing No
-slice_packing YES
-optimize_primitives YES
-use_clock_enable Auto
-use_sync_set Auto
-use_sync_reset Auto
-iob auto
-equivalent_register_removal NO
-slice_utilization_ratio_maxmargin 5