Sign in

username:

password:



Not a member?

Search Comp.Arch.FPGA



Search tips

fpga by Keywords

Altera | ASIC | CPLD | Cyclone | DCM | DDR | DSP | Ethernet | ISE | JTAG | Linux | LVDS | Microblaze | ML310 | Modelsim | NIOS | OPB | PCI | Quartus | RocketIO | SDRAM | Spartan | Spartan3 | SRAM | Stratix | Verilog | VHDL | Virtex | Virtex-4 | Virtex-II | Xilinx | XST


Ads

See Also

DSPEmbedded SystemsElectronics

Comp.Arch.FPGA | Creating EDIF from Verilog, then using VHDL wrapper

There are 3 messages in this thread.

You are currently looking at messages 0 to 3.

Creating EDIF from Verilog, then using VHDL wrapper - Robin Bruce - 2006-07-20 12:13:00

Hi group, here's a question:

Can I synthesise a component described in Verilog, obtain an EDIF, then
write a VHDL wrapper around it so as to integrate it into a greater
VHDL project.

yours in ignorance,

Robin
______________________________
Join the blogging team on FPGARelated.com and earn rewards! Details Here.



Re: Creating EDIF from Verilog, then using VHDL wrapper - Antti - 2006-07-20 12:29:00

Robin Bruce schrieb:

> Hi group, here's a question:
>
> Can I synthesise a component described in Verilog, obtain an EDIF, then
> write a VHDL wrapper around it so as to integrate it into a greater
> VHDL project.
>
> yours in ignorance,
>
> Robin

you should yes.
most of the tools allow any mix of verilog-vhdl, but you can also use
edif as interim format

antti

Re: Creating EDIF from Verilog, then using VHDL wrapper - John Adair - 2006-07-21 16:18:00

Robin

Coming from a similar direction is one of our TechiTips here
http://www.enterpoint.co.uk/techitips/Previous_TechiTips/techitips_increment_synth.html.
It is a little bit old now but the module build up approach described
is still applicable to mixed language application.

John Adair
Enterpoint Ltd.

Robin Bruce wrote:
> Hi group, here's a question:
>
> Can I synthesise a component described in Verilog, obtain an EDIF, then
> write a VHDL wrapper around it so as to integrate it into a greater
> VHDL project.
> 
> yours in ignorance,
> 
> Robin
______________________________
Join the blogging team on FPGARelated.com and earn rewards! Details Here.