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Comp.Arch.FPGA | Minimum frequency at which ddr can operate
There are 5 messages in this thread.
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Minimum frequency at which ddr can operate - subint - 2006-08-02 02:55:00
Hi,
I am using a ddr(mt46v32m16fn -6) ddr and Virtex4 (lx60) fpga.
And i am using the controller generated by the MIG1.5 tool. When i run
this controller in the real hardware i am getting zeros in the result
bus(read_data_fifo_out)... Dont know where i am wrong.
I am monitored all my controller signals using the chipscope
and they are all working fine for me. But the ddr is not giving
anything back...
Can u guys please tell me what is the minimum frequency at
which i can operate the ddr controller.
regards
subin
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Re: Minimum frequency at which ddr can operate - =?UTF-8?B?R8OzcnNraSBBZGFt?= - 2006-08-02 05:57:00
Użytkownik subint napisał: > Hi, > I am using a ddr(mt46v32m16fn -6) ddr and Virtex4 (lx60) fpga. > And i am using the controller generated by the MIG1.5 tool. When i run > this controller in the real hardware i am getting zeros in the result > bus(read_data_fifo_out)... Dont know where i am wrong. > I am monitored all my controller signals using the chipscope > and they are all working fine for me. But the ddr is not giving > anything back... > Can u guys please tell me what is the minimum frequency at > which i can operate the ddr controller. > regards > subin > Proper frequency range for your memory is from 77MHz to 166MHz. Adam______________________________
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Re: Minimum frequency at which ddr can operate - PeteS - 2006-08-02 08:21:00
G=F3rski Adam wrote: > Uzytkownik subint napisal: > > Hi, > > I am using a ddr(mt46v32m16fn -6) ddr and Virtex4 (lx60) fpga. > > And i am using the controller generated by the MIG1.5 tool. When i run > > this controller in the real hardware i am getting zeros in the result > > bus(read_data_fifo_out)... Dont know where i am wrong. > > I am monitored all my controller signals using the chipscope > > and they are all working fine for me. But the ddr is not giving > > anything back... > > Can u guys please tell me what is the minimum frequency at > > which i can operate the ddr controller. > > regards > > subin > > > > Proper frequency range for your memory is from 77MHz to 166MHz. > > Adam The Spec minimum for DDR is 83.33MHz (See the JEDEC data sheet: http://download.micron.com/pdf/misc/JEDEC79R2.pdf ) Cheers PeteS
Re: Minimum frequency at which ddr can operate - =?UTF-8?B?R8OzcnNraSBBZGFt?= - 2006-08-02 11:19:00
Użytkownik PeteS napisał: > Górski Adam wrote: > >>Uzytkownik subint napisal: >> >>>Hi, >>> I am using a ddr(mt46v32m16fn -6) ddr and Virtex4 (lx60) fpga. >>>And i am using the controller generated by the MIG1.5 tool. When i run >>>this controller in the real hardware i am getting zeros in the result >>>bus(read_data_fifo_out)... Dont know where i am wrong. >>> I am monitored all my controller signals using the chipscope >>>and they are all working fine for me. But the ddr is not giving >>>anything back... >>> Can u guys please tell me what is the minimum frequency at >>>which i can operate the ddr controller. >>>regards >>>subin >>> >> >>Proper frequency range for your memory is from 77MHz to 166MHz. >> >>Adam > > > The Spec minimum for DDR is 83.33MHz (See the JEDEC data sheet: > http://download.micron.com/pdf/misc/JEDEC79R2.pdf > ) Maybe, but for this chip is about 77MHz ( 13ns cycle length ) Adam______________________________
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Re: Minimum frequency at which ddr can operate - PeteS - 2006-08-02 14:18:00
G=F3rski Adam wrote: > Uzytkownik PeteS napisal: > > > G=F3rski Adam wrote: > > > >>Uzytkownik subint napisal: > >> > >>>Hi, > >>> I am using a ddr(mt46v32m16fn -6) ddr and Virtex4 (lx60) fpga. > >>>And i am using the controller generated by the MIG1.5 tool. When i run > >>>this controller in the real hardware i am getting zeros in the result > >>>bus(read_data_fifo_out)... Dont know where i am wrong. > >>> I am monitored all my controller signals using the chipscope > >>>and they are all working fine for me. But the ddr is not giving > >>>anything back... > >>> Can u guys please tell me what is the minimum frequency at > >>>which i can operate the ddr controller. > >>>regards > >>>subin > >>> > >> > >>Proper frequency range for your memory is from 77MHz to 166MHz. > >> > >>Adam > > > > > > The Spec minimum for DDR is 83.33MHz (See the JEDEC data sheet: > > http://download.micron.com/pdf/misc/JEDEC79R2.pdf > > ) > > Maybe, but for this chip is about 77MHz ( 13ns cycle length ) > > Adam Micron does a good job of supporting lower speeds than the spec, but if the OP wants the system to work (guaranteed) for various parts across temperature, it's best to follow the spec. FWIW, I've made DDR run at 66MHz before (using Micron parts). Cheers PeteS______________________________
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