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Comp.Arch.FPGA | Xilinx OPB BFM simulation error with m_ABus signal
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Xilinx OPB BFM simulation error with m_ABus signal - lancos - 2006-09-22 12:40:00
Hi, I'm developing a custom OPB master peripheral for Spartan3. I don't use IPIF. During simulation with BFM and Modelsim I noticed that OPB_ABus is not correct in the following case: my peripheral loose arbitration but still put a valid value on the m_ABus (for example 10000), the new master put on his m_ABus for example 40000, the result is on OPB_ABus is 50000. It seems that the m_ABus is not ANDed with m_select signal. I read from OPB specifications on page 11: "The Mn_ABus signals from each OPB Master are AND'ed with that master's Mn_select, and the resulting buses from all OPB masters are then OR'ed together to form OPB_ABus. Thus, a master device may continue to drive data onto Mn_ABus when its select is not asserted." So my question is: the AND operation should be done on my peripheral or on the opb arbitrer? Is it a fault in the BFM toolkit?______________________________
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Re: Xilinx OPB BFM simulation error with m_ABus signal - David Ashley - 2006-09-22 14:15:00
lancos wrote: > Hi, > I'm developing a custom OPB master peripheral for Spartan3. I don't use > IPIF. During simulation with BFM and Modelsim I noticed that OPB_ABus > is not correct in the following > case: my peripheral loose arbitration but still put a valid value on > the m_ABus (for example 10000), the new master put on his m_ABus for > example 40000, the result is on OPB_ABus is 50000. > It seems that the m_ABus is not ANDed with m_select signal. I read from > OPB specifications on page 11: > "The Mn_ABus signals from each OPB Master are AND'ed with that > master's Mn_select, and the resulting buses from all OPB masters are > then OR'ed together to form OPB_ABus. Thus, a master device may > continue to drive data onto Mn_ABus when its select is not asserted." > > So my question is: the AND operation should be done on my peripheral or > on the opb arbitrer? > Is it a fault in the BFM toolkit? > My understanding was that all masters need to drive 0's when they don't own the bus. But I have no personal experience with the xilinx busses, it's just heresay. -Dave -- David Ashley http://www.xdr.com/dash Embedded linux, device drivers, system architecture______________________________
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