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Hello, Is there any facility in ISE to automatically indent source code? The similar technique is available in C/C++ editors and I it is very simple to add it to ISE for indenting smartly VHDL and Verilog source codes. Regards
mans schrieb: > Hello, > Is there any facility in ISE to automatically indent source code? The > similar technique is available in C/C++ editors and I it is very simple to > add it to ISE for indenting smartly VHDL and Verilog source codes. Not as far as I know. But you can tell ISE to use an external editor like Xemcas, Notepad++, Eclipse with the VHDL-plugin... they all have indentation, syntax highlighting, templates, code folding... -- My email address is only valid until the end of the month. Try figuring out what the address is going to be after that...
On Apr 18, 2:38 am, "mans" <(myname_here)_123...@yahoo.com> wrote: > Hello, > Is there any facility in ISE to automatically indent source code? The > similar technique is available in C/C++ editors and I it is very simple to > add it to ISE for indenting smartly VHDL and Verilog source codes. > > Regards Wow, TWO votes for the ISE text editor ... -a