Sign in
Search Comp.Arch.FPGA
fpga by Keywords
Altera | ASIC | CPLD | Cyclone | DCM | DDR | DSP | Ethernet | ISE | JTAG | Linux | LVDS | Microblaze | ML310 | Modelsim | NIOS | OPB | PCI | Quartus | RocketIO | SDRAM | Spartan | Spartan3 | SRAM | Stratix | Verilog | VHDL | Virtex | Virtex-4 | Virtex-II | Xilinx | XST
Ads
See Also
Comp.Arch.FPGA | PowerPC_DDR
There are 1 messages in this thread.
You are currently looking at messages 0 to 1.
PowerPC_DDR - 2007-05-12 07:05:00
I am trying to interface a PowerPC in a Virtex-II Pro device with an external DDR memory on the board. I am using the following fucntions to read an write to the memory: //write num. 300 to position 0 in //the DDR XGpio_mSetDataReg(0, 1, 300); //read position 0 in the DDR = ReadFromGPInput(0); I have enabled burst mode, but these two functions take significan time to write and read the DDR. Are there any other functions which I can use in order to speed up the process?______________________________
Join the blogging team on FPGARelated.com and earn rewards! Details Here.
