Sign in
Search Comp.Arch.FPGA
fpga by Keywords
Altera | ASIC | CPLD | Cyclone | DCM | DDR | DSP | Ethernet | ISE | JTAG | Linux | LVDS | Microblaze | ML310 | Modelsim | NIOS | OPB | PCI | Quartus | RocketIO | SDRAM | Spartan | Spartan3 | SRAM | Stratix | Verilog | VHDL | Virtex | Virtex-4 | Virtex-II | Xilinx | XST
Ads
See Also
Comp.Arch.FPGA | LVDS on Drigmorn1
There are 1 messages in this thread.
You are currently looking at messages 0 to 1.
LVDS on Drigmorn1 - John Adair - 2007-12-15 17:43:00
In answer to all of you who asked about LVDS support on Drigmorn1 we believe 2 pairs of LVDS are very viable but as yet have not tested the feature. Some others may be possible but pin routing is not so good. John Adair Hone of Drigmorn1. The low cost starter FPGA development board.
