Hello Techies,
I would like to use an off the shelf FPGA which I would be develpoing
to test an ASIC or other FPGA. My questions is,
1. How do we connect the Output of FPGAs as Input of the ASIC and vice
versa?
2. The FPGA has to check various protocols like SPI, UART and other
things?


I need to know various methods by which this can be done. Any answers
on this will be greatly apprecaited.

Thanks in advance.

Regards
Hariharan K Srinivasan.

usually a tool called "soldering iron"
must be used.

Antti

On 27 Feb., 10:42, harisr...@gmail.com wrote:
> Hello Techies,
> I would like to use an off the shelf FPGA which I would be develpoing
> to test an ASIC or other FPGA. My questions is,
> 1. How do we connect the Output of FPGAs as Input of the ASIC and vice
> versa?
> 2. The FPGA has to check various protocols like SPI, UART and other
> things?
>
> I need to know various methods by which this can be done. Any answers
> on this will be greatly apprecaited.
>
> Thanks in advance.
>
> Regards
> Hariharan K Srinivasan.

On Wed, 27 Feb 2008 02:08:34 -0800 (PST), Antti
wrote:

>usually a tool called "soldering iron" must be used.

LOL.

Antti, that's unfair.... In the interests of public 
safety, you should at least have explained which 
end of it he should pick up.
-- 
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
j...@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which 
are not the views of Doulos Ltd., unless specifically stated.

On 27 Feb., 12:18, Jonathan Bromley
<jonathan.brom...@MYCOMPANY.com>
wrote:
> On Wed, 27 Feb 2008 02:08:34 -0800 (PST), Antti wrote:
> >usually a tool called "soldering iron" must be used.
>
> LOL.
>
> Antti, that's unfair.... In the interests of public
> safety, you should at least have explained which
> end of it he should pick up.
> --
> Jonathan Bromley, Consultant
>
Hmm let me think...
I think must pick ASIC end first?

Antti

The new Cortex A8 OMAP from TI has an
entertainingly solderable package 
for the DIY enthusiast:

5l5-pin PBGA Package, 0.5mm Ball Pitch (Top), 0.4mm Ball Pitch (Bottom)

Still, at 14x14mm, the package gives you room to work. A good test for a 
toaster oven....

"Tim (one of many)"
<t...@nooospam.roockyloogic.com> writes:
> 5l5-pin PBGA Package, 0.5mm Ball Pitch (Top), 0.4mm Ball Pitch (Bottom)

It has balls on both the top and bottom?

On Wed, 27 Feb 2008 11:18:25 +0000, Jonathan
Bromley
<j...@MYCOMPANY.com> wrote:

>On Wed, 27 Feb 2008 02:08:34 -0800 (PST), Antti wrote:
>
>>usually a tool called "soldering iron" must be used.
>
>LOL.
>
>Antti, that's unfair.... In the interests of public 
>safety, you should at least have explained which 
>end of it he should pick up.

The problem with soldering irons is that when they're hot and falling
towards the carpet under the table, it's difficult to judge which side
one actually grabs when one catches it. "Yes, I got it" is quickly
followed by "ahhh, I got it". 

On 27 Feb., 10:42, harisr...@gmail.com wrote:
> Hello Techies,
> I would like to use an off the shelf FPGA which I would be develpoing
> to test an ASIC or other FPGA. My questions is,
> 1. How do we connect the Output of FPGAs as Input of the ASIC and vice
> versa?
> 2. The FPGA has to check various protocols like SPI, UART and other
> things?
>
> I need to know various methods by which this can be done. Any answers
> on this will be greatly apprecaited.

Jokes aside: You should first find out, how to connect an asic to an
asic
and how to connect an FPGA to an FPGA. Mabye you can deduce the answer
to that question from that.

Maybe you can find an example design that uses more than one chip and
see
how the connections are created.

Here are some examples of how ASICs can be connected:
1. Optical
http://www.eetimes.com/news/design/showArticle.jhtml;jsessionid=PA2UODNLZHDHMQSNDLOSKHSCJU
NN2JVN?articleID=18311314

2. AC coupling
http://www.ece.ncsu.edu/erl/html2/papers/paulf/2003/paulf_2003_09_franzon.pdf

3. + 4. + 5.
3D stacking
Free Space Optical Interconnects
Radio Coupling
http://www.eetimes.com/conf/iedm/showArticle.jhtml?articleID=18306693&kc=5012

Kolja Sulimma

On Feb 29, 3:21=A0pm, "comp.arch.fpga"
<ksuli...@googlemail.com> wrote:
> On 27 Feb., 10:42, harisr...@gmail.com wrote:
>
> > Hello Techies,
> > I would like to use an off the shelf FPGA which I would be develpoing
> > to test an ASIC or other FPGA. My questions is,
> > 1. How do we connect the Output of FPGAs as Input of the ASIC and vice
> > versa?
> > 2. The FPGA has to check various protocols like SPI, UART and other
> > things?
>
> > I need to know various methods by which this can be done. Any answers
> > on this will be greatly apprecaited.
>
> Jokes aside: You should first find out, how to connect an asic to an
> asic
> and how to connect an FPGA to an FPGA. Mabye you can deduce the answer
> to that question from that.
>
> Maybe you can find an example design that uses more than one chip and
> see
> how the connections are created.
>
> Here are some examples of how ASICs can be connected:
> 1. Opticalhttp://www.eetimes.com/news/design/showArticle.jhtml;jsessionid=
=3DPA2UO...
>
> 2. AC couplinghttp://www.ece.ncsu.edu/erl/html2/papers/paulf/2003/paulf_20=
03_09_fra...
>
> 3. + 4. + 5.
> 3D stacking
> Free Space Optical Interconnects
> Radio Couplinghttp://www.eetimes.com/conf/iedm/showArticle.jhtml?articleID=
=3D18306693...
>
> Kolja Sulimma

Thanks a lot Kolja.

I really appreciate your answers and will check the kinks you have
provided.

Regards
Hari