I get the impression that Altera is in the lead
when it comes to speed on 
DDR[3] interfaces. Can anyone confirm/deny this?

Altera claims to be able to clock a 64/72bit wide DDR3 at 533Mhz on the 
StratixIII: http://www.altera.com/b/stratixiii-ddr3-video.html
For Xilinx, the fastest reference design I can find is 32bit wide DDR3 at 
400Mhz for the Virtex5. Can Virtex4 do better?

So far, it looks to me like Altera did a KO on Xilinx when it comes to DDR3. 
Please tell me I'm wrong, Id hate to switch tools :p
(and I need hard facts, not sales numbers)

On 14 Mrz., 09:28, "Morten Leikvoll"
<mleik...@yajoo.nospam> wrote:
> I get the impression that Altera is in the lead when it comes to speed on
> DDR[3] interfaces. Can anyone confirm/deny this?
>
> Altera claims to be able to clock a 64/72bit wide DDR3 at 533Mhz on the
> StratixIII:http://www.altera.com/b/stratixiii-ddr3-video.html
> For Xilinx, the fastest reference design I can find is 32bit wide DDR3 at
> 400Mhz for the Virtex5. Can Virtex4 do better?
>
> So far, it looks to me like Altera did a KO on Xilinx when it comes to DDR3.
> Please tell me I'm wrong, Id hate to switch tools :p
> (and I need hard facts, not sales numbers)

no, V4 can not do better
.

KO? did you count 10? :)

Antti

PS even DDR2 designs at 200MHz is not trivial for V4/V5, I would be
very careful before trying some Xilinx chip at memory clock above what
Xilinx itself claims. It doesnt mean that is not doable of course.
Already V4 slowest speed grade FPGA fabric can have signals as high as
1GHz (my own test measurements!) for very short distances, so 533
should not be impossible for V5 highest speed grade. But its not the
fabric or I/O speed alone that is needed for the successful
implementation.

PPS Xilinx are you KO?
1,2,3... tick-tock clock is ticking

Morten Leikvoll wrote:
> I get the impression that Altera is in the lead when it comes to speed on 
> DDR[3] interfaces. Can anyone confirm/deny this?
> 
> Altera claims to be able to clock a 64/72bit wide DDR3 at 533Mhz on the 
> StratixIII: http://www.altera.com/b/stratixiii-ddr3-video.html
> For Xilinx, the fastest reference design I can find is 32bit wide DDR3 at 
> 400Mhz for the Virtex5. Can Virtex4 do better?

Altera has dedicated logic for source synchronous clocking for memories,
that might make the difference. But be aware that that dedicated logic
also creates more restrictions to pin placement and can waste big
amounts of pins if you use many IO-voltages. In Xilinx V4/V5 the pin
placement is sometimes easier to do. IO-structure is always a compromise
between speed and flexibility.

--Kim

Morten,

We chose different paths:  Altera used hardened logic to get their
speed, where we chose to stay general, and use any pins/any fabric/any
standard.

We have DDR3 designs that are also working at 533 MHz.

Best to sit down and talk with your FAE on the subject.

There are many other factors to consider (not he least of which is we
are in full production on Virtex 5 LX, LXT, SXT, and they are just now
in ES on on few parts, with S3 GX canceled completely).

Even though Altera has some really mean, cool, and neat power point
presentations, we basically have no competition whatsoever at 65nm at
the high end (as you can't ship power point in your systems).

Austin

On 14 Mrz., 16:24, austin
<aus...@xilinx.com> wrote:
> Morten,
>
> We chose different paths:  Altera used hardened logic to get their
> speed, where we chose to stay general, and use any pins/any fabric/any
> standard.
>
> We have DDR3 designs that are also working at 533 MHz.
>
> Best to sit down and talk with your FAE on the subject.
>
> There are many other factors to consider (not he least of which is we
> are in full production on Virtex 5 LX, LXT, SXT, and they are just now
> in ES on on few parts, with S3 GX canceled completely).
>
> Even though Altera has some really mean, cool, and neat power point
> presentations, we basically have no competition whatsoever at 65nm at
> the high end (as you can't ship power point in your systems).
>
> Austin

LOL, eh, think there is only one tool we need:

"powerpoint to silicon compiler" ;)

Antti

PS 553 MHz DDR3 without hardened io and general purpose FPGA is nice
achievment

Antti <A...@googlemail.com> wrote:

>On 14 Mrz., 16:24, austin <aus...@xilinx.com> wrote:
>> Morten,
>>
>> We chose different paths:  Altera used hardened logic to get their
>> speed, where we chose to stay general, and use any pins/any fabric/any
>> standard.
>>
>> We have DDR3 designs that are also working at 533 MHz.
>>
>> Best to sit down and talk with your FAE on the subject.
>>
>> There are many other factors to consider (not he least of which is we
>> are in full production on Virtex 5 LX, LXT, SXT, and they are just now
>> in ES on on few parts, with S3 GX canceled completely).
>>
>> Even though Altera has some really mean, cool, and neat power point
>> presentations, we basically have no competition whatsoever at 65nm at
>> the high end (as you can't ship power point in your systems).
>>
>> Austin
>
>LOL, eh, think there is only one tool we need:
>
>"powerpoint to silicon compiler" ;)
>
>Antti
>
>PS 553 MHz DDR3 without hardened io and general purpose FPGA is nice
>achievment

But is it worth something in a real application or is it just 'cool'?
When reading Xilinx memory interface application notes I get the
feeling the cool factor (to get numbers to put in nice powerpoint
presentations) is often more important than practical use. 533 MHz is
pushing the limits on a Xilinx device but with dedicated I/O logic
(like fast local clock paths for DQS) it would be a breeze to design.
The way Xilinx works they say it can be done, but every more
complicated interface like PCI, DDRx, PCI Express, serial ata, etc,
etc is suddenly extremely difficult and should be left to the
professionals. It is like Ford saying their cars are great and better
than the rest, but in the real world you'll find you need 3 arms to
drive around.

A lot can be said about Altera, but almost every hobbiest FPGA user in
the world is using Altera devices. This certainly says something about
the ease of use of Altera parts and software.

-- 
Programmeren in Almere?
E-mail naar nico@nctdevpuntnl (punt=.)

On Mar 14, 10:41=A0am, n...@puntnl.niks (Nico
Coesel) wrote:
<snip>
>
> A lot can be said about Altera, but almost every hobbiest FPGA user in
> the world is using Altera devices. This certainly says something about
> the ease of use of Altera parts and software.
>
<snip>

I'd love to see your reference  ;-)
Or perhaps you know most of the hobbyists personally?

I like seeing hobbyists use the tools and parts that are best for
their activities whatever they may be.

- John_H

On 14 Mrz., 19:03, John_H
<newsgr...@johnhandwork.com> wrote:
> On Mar 14, 10:41 am, n...@puntnl.niks (Nico Coesel) wrote:
> <snip>
>
> > A lot can be said about Altera, but almost every hobbiest FPGA user in
> > the world is using Altera devices. This certainly says something about
> > the ease of use of Altera parts and software.
>
> <snip>
>
> I'd love to see your reference  ;-)
> Or perhaps you know most of the hobbyists personally?
>
> I like seeing hobbyists use the tools and parts that are best for
> their activities whatever they may be.
>
> - John_H

almost ROTFL :)

1. all assumptions are assumed false..

well, there is some trend towards "altera-love" for the hobby use:

1) C1 reconfigurable computer -> ACEX-1K
2) japanese MSX computer -> Cyclone
3) TREX-C1 -> Cyclone

so some retro-hobby folks defenetly prefer Altera,
but that of course doesnt mean "almost every hobby user"

Antti

...

~984 hits for - Altera FPGA Hobby use - on google (no quotes).

~27,200 hits for - Xilinx FPGA Hobby use - on google (no quotes).

Not that "Hobby Use" is a big line item on the financial report, but...

As much as this is not a scientific survey, it is still pretty telling!

Oh yes, those hobbiests are just swarming all over those Altera parts.

Austin

On 14 Mrz., 19:55, austin
<aus...@xilinx.com> wrote:
> ...
>
> ~984 hits for - Altera FPGA Hobby use - on google (no quotes).
>
> ~27,200 hits for - Xilinx FPGA Hobby use - on google (no quotes).
>
> Not that "Hobby Use" is a big line item on the financial report, but...
>
> As much as this is not a scientific survey, it is still pretty telling!
>
> Oh yes, those hobbiests are just swarming all over those Altera parts.
>
> Austin

Austin,

your "hit comparison" is example of bad(brilliant) use of google for
statistics.

the 27000 to 990 is not true ration of xilinx:hobby vs altera:hobby

fact is there are no commercial retro-compurers ever built on Xilinx
devices, all are Altera based, this has surprised my sometimes, as it
really made me also think that hobby people (at least some) prefer
Altera

of course on reason for hobby-altera is the fact that LARGEST non-BGA
FPGA device is made by Altera. And that latest Xilinx low cost family
is not all available in non-BGA packages (i dont count the tiny S3A-50
at all, as it just so tiny)

Antti