Hi,

I'm trying to build a system for a XC2V6000 FPGA. The problem I have
is that I have to implement a PLB. But the PLB shipped with the EDK
10.1 is the PLB_v46 which doesn't support the virtex II, only V2Pro
and V4.

At the datasheets on the xilinx website I found that the PLB_v34
should support the V2  (see this link: 
http://www.xilinx.com/products/ipcenter/plb_v34.htm
).

But there exist two versions of the datasheet. One on the xilinx
website and one at the pcore directory. I got the pcore from the EDK
8.2 which includes the PLB_v34 in version 1.01a. The datasheet says
that this version only supports V2Pro and V4.

I just took that core and copied it to the pcore directory of my EDK
10.1 project and added it to the system. I ignored the warnings and
started the build process but this was aborted with the reason that
the Virtex2 isn't supported.



Does that mean that the datasheet on the xilinx website is wrong? Did
I something wrong?



Has anyone tried to implement a PLB on a Virtex II system?



Thanks.

There was a similar discussion about device support on this list, for edk 9.2:

http://groups.google.de/group/comp.arch.fpga/browse_frm/thread/d91828e0a0528747/fdb2b5b939
566021?hl=de&lnk=st&q=edk+9.2+virtex+2+group%3Acomp.arch.fpga#fdb2b5b939566021

I remember that VirtexII devices should be supported properly again in 
version 10.1 which is not the case, obviously.

If you want to hack your EDK, change the *.mpd file: add VirtexII to the 
supported families and see what happens then. (And tell us)

-Markus

rmeiche schrieb:
> Hi,
> 
> I'm trying to build a system for a XC2V6000 FPGA. The problem I have
> is that I have to implement a PLB. But the PLB shipped with the EDK
> 10.1 is the PLB_v46 which doesn't support the virtex II, only V2Pro
> and V4.
> 
> At the datasheets on the xilinx website I found that the PLB_v34
> should support the V2  (see this link: 
http://www.xilinx.com/products/ipcenter/plb_v34.htm
> ).
> 
> But there exist two versions of the datasheet. One on the xilinx
> website and one at the pcore directory. I got the pcore from the EDK
> 8.2 which includes the PLB_v34 in version 1.01a. The datasheet says
> that this version only supports V2Pro and V4.
> 
> I just took that core and copied it to the pcore directory of my EDK
> 10.1 project and added it to the system. I ignored the warnings and
> started the build process but this was aborted with the reason that
> the Virtex2 isn't supported.
> 
> 
> 
> Does that mean that the datasheet on the xilinx website is wrong? Did
> I something wrong?
> 
> 
> 
> Has anyone tried to implement a PLB on a Virtex II system?
> 
> 
> 
> Thanks.

On 29 Mai, 08:56, Markus <n...@nowhere.org>
wrote:
> There was a similar discussion about device support on this list, for edk 9.2:
>
> http://groups.google.de/group/comp.arch.fpga/browse_frm/thread/d91828...
>
> I remember that VirtexII devices should be supported properly again in
> version 10.1 which is not the case, obviously.
>
> If you want to hack your EDK, change the *.mpd file: add VirtexII to the
> supported families and see what happens then. (And tell us)
>
> -Markus
>
> rmeiche schrieb:
>
> > Hi,
>
> > I'm trying to build a system for a XC2V6000 FPGA. The problem I have
> > is that I have to implement a PLB. But the PLB shipped with the EDK
> > 10.1 is the PLB_v46 which doesn't support the virtex II, only V2Pro
> > and V4.
>
> > At the datasheets on the xilinx website I found that the PLB_v34
> > should support the V2  (see this link: 
http://www.xilinx.com/products/ipcenter/plb_v34.htm
> > ).
>
> > But there exist two versions of the datasheet. One on the xilinx
> > website and one at the pcore directory. I got the pcore from the EDK
> > 8.2 which includes the PLB_v34 in version 1.01a. The datasheet says
> > that this version only supports V2Pro and V4.
>
> > I just took that core and copied it to the pcore directory of my EDK
> > 10.1 project and added it to the system. I ignored the warnings and
> > started the build process but this was aborted with the reason that
> > the Virtex2 isn't supported.
>
> > Does that mean that the datasheet on the xilinx website is wrong? Did
> > I something wrong?
>
> > Has anyone tried to implement a PLB on a Virtex II system?
>
> > Thanks.

Hello and sorry for my late answer.

I tried it with "hacking" the mpd file and it works. I used the
plb_v34 (version 1.02a) and the opb2plbbridge (version 1.00c). I only
edited the "ARCH_SUPPORT_MAP".