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Comp.Arch.FPGA | Code blocks to realize this in VHDL
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Code blocks to realize this in VHDL - mstanisz - 2009-05-05 17:27:00
I've searched a little more and found that if I can somehow merge Ben Cohen's 0 ohm device (http://groups.google.com/group/comp.lang.vhdl/msg/7d14832588a0cabb) with a bi-directional MUX (http://www.tek-tips.com/viewthread.cfm?qid=1188582&page=7), then I might be able to create the VHDL module I would need. The bus splitting doesn't need a module, since in VHDL I'll just manipulate bit0 of the inputted flash data bus and pass the other 7 bits through. Would this work? Thanks. Matt______________________________
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Re: Code blocks to realize this in VHDL - Jonathan Bromley - 2009-05-06 04:23:00
On Tue, 05 May 2009 16:27:20 -0500, "mstanisz" wrote: >I've searched a little more and found that if I can somehow merge Ben >Cohen's 0 ohm device >(http://groups.google.com/group/comp.lang.vhdl/msg/7d14832588a0cabb) with a >bi-directional MUX >(http://www.tek-tips.com/viewthread.cfm?qid=1188582&page=7), then I might >be able to create the VHDL module I would need. The bus splitting doesn't >need a module, since in VHDL I'll just manipulate bit0 of the inputted >flash data bus and pass the other 7 bits through. Would this work? I don't know exactly what you're trying to do, but you should be aware of these points: 1) The zero-ohm link model won't synthesise. Furthermore, it misbehaves in some corner cases that may get you, depending on what sort of logic appears at each end of the link. 2) The bidi-mux code you mention is effectively based on a bidirectional tri-state buffer on the mux I/O. This is OK, even inside an FPGA; as has been discussed here several times, the tri-states will be mapped to muxes by a synthesis tool; but you will need to be VERY careful to ensure that the direction-control bit is correctly manipulated. Given that the bidi-mux needs a proper direction control signal, I don't see what you're gaining by all this palaver. -- Jonathan Bromley, Consultant DOULOS - Developing Design Know-how VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK j...@MYCOMPANY.com http://www.MYCOMPANY.com The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated.