I am using Virtex4 FPGA at really low frequecy
(150KHz).  I need to
double the clock at this frequency and would like to use DCM for it.
I am not sure if the DCM in V4 LX100 can take such low frequency.

Any ideas will be great.

Thanks.

CP

On May 31, 8:00=A0pm, cpan...@yahoo.com wrote:
> I am using Virtex4 FPGA at really low frequecy (150KHz). =A0I need to
> double the clock at this frequency and would like to use DCM for it.
> I am not sure if the DCM in V4 LX100 can take such low frequency.
>
> Any ideas will be great.
>
> Thanks.
>
> CP

The DCM cannot handle this, but I published a circuit many years ago,
in the "Six easy pieces" group:
Run your low frequency through an XNOR circuit, its output is the
doubled frequency.
That output also clocks a flip-flop whose Q output, through an
inverter, feeds its own D input. Obviously a toggling flip-flop.
That D input is also connected to the other input of the XNOR gate.
That's all.
Here is the text:

4. Double the Clock Frequency
An input signal can be doubled in frequency, provided the resulting 2f
clock can tolerate cycle-to-cycle jitter caused by an imperfect input
duty cycle. The circuit described above generates an output pulse in
response to each transition of the input.
The output rising edge is delayed one TILO from either input
transition. The output High time is the sum of a clock-to-Q delay plus
two TILO delays, about 2 ns in a fast part. This output pulse clocks
other flip-flops on the same die reliably. (At a low temperature and
high VCC, the pulse will be shorter, but the flip-flop response is
also faster under these conditions.)
Any control input that prevents the flip-flop from toggling changes
the output frequency to fout =3D fin.
This asynchronous circuit is frowned upon by all true digital
designers. It should only be used as a tool of last resort. Note that
the DLL or DCM in all Virtex or Spartan-II devices provide frequency
doubling for free, if the input frequency is larger than 25 MHz. The
frequency-doubler circuit explained above has no minimum frequency
limitation.