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Comp.Arch.FPGA | Programming Failed

There are 1 messages in this thread.

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Programming Failed - salquraish - 2010-01-11 06:21:00

I am using JTAG parallel cable to program FPGA,
while programming the FPGAcode into the internal flash power was disconnected and finally "PROGRAMFAILED" message was observed.
I had tried to program several times but still not able to program.

The observed log is below, please find it.

INFO:iMPACT - Current time: Fri Jan 8 21:38:55 2010
// *** BATCH CMD : Program -p 1 -e -v 
PROGRESS_START - Starting Operation.
Maximum TCK operating frequency for this device chain: 10000000.
Validating chain...
Boundary-scan chain validated successfully.
'1': SPI access core not detected. SPI access core will be downloaded tothe device to enable operations.
INFO:iMPACT - Downloading core fileC:/Xilinx/11.1/ProgrammingTools/spartan3a/data/xc3s200an_spi.cor.
'1': Downloading core...
done.
'1': Reading status register contents...
CRC error                                         :         0
IDCODE not validated while writing FDRI           :         0
DCM Locked                                        :         1
status of GTS_CFG_B                               :         1
status of GWE                                     :         1
status of GHIGH                                   :         1
value of VSEL pin 0                               :         1
value of VSEL pin 1                               :         1
value of VSEL pin 2                               :         1
value of MODE pin M0                              :         1
value of MODE pin M1                              :         1
value of MODE pin M2                              :         0
value of CFG_RDY (INIT_B)                         :         1
DONEIN input from Done Pin                        :         1
SYNC word not found                               :         0
INFO:iMPACT:2219 - Status register values:
INFO:iMPACT - 0011 1111 1110 1100 
INFO:iMPACT:2492 - '1': Completed downloading core to device.
INFO:iMPACT - '1': Checking done pin....done.
'1': Core downloaded successfully.
INFO:iMPACT - Address 0x00000000 is in sector 0.
INFO:iMPACT - Start block = 0 for address 0x00000000.
INFO:iMPACT - Address 0x0002480B is not located at the start of a sectorboundary. The whole sector will be erased.
INFO:iMPACT - Address 0x0002480B is in sector 3.
INFO:iMPACT - End block = 95 for address 0x0002480B.
INFO:iMPACT - Address 0x00000000 is in sector 0.
INFO:iMPACT - Address 0x0002480B is not located at the start of a sectorboundary. The whole sector will be erased.
INFO:iMPACT - Address 0x0002480B is in sector 3.
INFO:iMPACT - Address 0x00000000 is in sector 0.
INFO:iMPACT - Address 0x0002480B is not located at the start of a sectorboundary. The whole sector will be erased.
INFO:iMPACT - Address 0x0002480B is in sector 3.
INFO:iMPACT - '1': Sector '0' is protected.
INFO:iMPACT - '1': Sector '1' is protected.
INFO:iMPACT - '1': Sector '2' is protected.
INFO:iMPACT - '1': Sector '3' is protected.
'1': Some sectors addressed by the configuration file are data protected.
'1': One or more sectors used by the current configuration file isprotected. Perform stand-alone erase operation to clear the protection.
'1': Configuration data download to FPGA was not successful. DONE did notgo high, please check your configuration setup and spi mode settings.
PROGRESS_END - End Operation.
Elapsed time =     20 sec.

Request your response at the earliest.

Regards,
Salma


	   
					
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