More venting then seeking help.

I got my Diligent Sparta board and I have to say it appears to be a
great value. Parts alone are worth the price.

The down side is the Xilinx software DVD took up something like 7 gigs
of hard drive space. As part of the install it looks for updates on
the web site. Near as I can figure the install is broken as it gets to
4% on the 'examining current software configuration' and crashes HARD!
Have to bring up Task Manager to kill it. Only took me about 10 times
of hitting that 4% to figure out something is wrong.

So while I am resting I decide to add up just how much patch they want
to add to my distribution DVD: 2.6 gigs. Gee, just got the DVD last
week and already 2.6 gigs of patches needed? The sad news is I live in
a rural area so I am still on dial up. I could get satelite internet
access but it runs something like $100/month last time I checked. At
50k I figure it would take about 8 days to download the patches. This
would take a serious chunk out of my 30 day license for the software.
I may go to my son's house to see if I can use his DSL to shorten the
download time.

So without the patch download the installation program didn't finish.
Most of the 'software suite' busts with an error message because of
the bad install and patch. I do get package to run and it is for the
Xilinx embedded core development package. I have no interest in
rolling my own embedded processor at this time. I mean it is great
that Xilinx gives me free stuff I don't need or ask for but I am so
rookie at this I don't even know what software goes with what products
yet. Kind of a bummer in that I have to burn hard drive space and
download patches for things I don't need or have any intention of
using.

I will try reinstalling the software. I will send off a polite email
to Xilinx suggesting they do small footprint installs specific to
hardware vs. kitchen sink suites.

The funny thing is 10 years ago I just sat down at a work station and
within minutes was placing 74LS type components and designing circuits
that could then be compiled to fit in a FPGA or CPLD. Time has passed
me by with new tools and techniques. I feel like I am getting into a
car and asking "Where are the reins?" There's a certain Rip Van Winkle
effect trying to get back into the fray.

Rick

Rick wrote:

> So while I am resting I decide to add up just how much patch they want
> to add to my distribution DVD: 2.6 gigs. Gee, just got the DVD last
> week and already 2.6 gigs of patches needed? The sad news is I live in
> a rural area so I am still on dial up. I could get satelite internet
> access but it runs something like $100/month last time I checked. At
> 50k I figure it would take about 8 days to download the patches.

I'll bet brand X would ship you a DVD in less time and for less money.

> The funny thing is 10 years ago I just sat down at a work station and
> within minutes was placing 74LS type components and designing circuits
> that could then be compiled to fit in a FPGA or CPLD. Time has passed
> me by with new tools and techniques. I feel like I am getting into a
> car and asking "Where are the reins?" There's a certain Rip Van Winkle
> effect trying to get back into the fray.

Brand A has a very nice schematic editor with TTL components.


     -- Mike Treseler

If the scale of the design has not changed since
you were designing
with schematics full of 74ls components, then that technique is just
as viable today as it was then. But typically, the scale of the
designs today renders schematics considerably less desirable than HDL.
And once you've learned the HDL for synthesis, using HDL for testing
your design is icing on the cake.

I started out using Cadence Concept schematics for Xilinx FPGA's in
the early 90's (XC3090), and built my own parameterizable library of
sizeable arithmetic and data path schematic symbols that worked great.
I had recursive schematic implementations (Concept lets you do that)
of binary trees, counters, etc. and all was well. I resisted HDL for a
short time (SW seemed to be headed in the other direction: from text
to pictures), but eventually saw the light and embraced VHDL. And now
I would not go back for anything.

Andy

On Jan 11, 2:43=A0pm, Andy
<jonesa...@comcast.net> wrote:
> If the scale of the design has not changed since you were designing
> with schematics full of 74ls components, then that technique is just
> as viable today as it was then. But typically, the scale of the
> designs today renders schematics considerably less desirable than HDL.
> And once you've learned the HDL for synthesis, using HDL for testing
> your design is icing on the cake.
>
> I started out using Cadence Concept schematics for Xilinx FPGA's in
> the early 90's (XC3090), and built my own parameterizable library of
> sizeable arithmetic and data path schematic symbols that worked great.
> I had recursive schematic implementations (Concept lets you do that)
> of binary trees, counters, etc. and all was well. I resisted HDL for a
> short time (SW seemed to be headed in the other direction: from text
> to pictures), but eventually saw the light and embraced VHDL. And now
> I would not go back for anything.
>
> Andy

Thanks for the pointers. I killed another day fumbling around to see
how much function I could get from the broken install and got to the
ttl schematic entry. The device list starts at 74LS138 and goes up to
74LS521. I'm not sure if it is the install or me. The simple logic
gates are there so I don't see a problem with picking up and placing a
2 input NAND gate vs. plunking a 74SL00 down. It's just an odd
combination of me having senior momments and trying to use a
professional tool in a hobbyist capacity. To make it clear, problem is
mostly me: I've never met an integrated development environment I
liked. I still like to use a text editor with an open DOS window to
write and compile my C code from the command line.<grin>

I think I will have to make the switch to VHDL. The stuff I want to do
like memory mapped hardware I/O is so trivial it shouldn't be too hard
to get to that skill level.
Things are looking up. My son has a 30 mbyte connection and said we
could patch up there in a half hour or so.

I'll spend some time studying so I can get to the point of asking
questions about VHDL.

Rick

Rick <r...@gmail.com> writes:

<snip>

>I think I will have to make the switch to VHDL. The stuff I want to do
>like memory mapped hardware I/O is so trivial it shouldn't be too hard
>to get to that skill level.
>Things are looking up. My son has a 30 mbyte connection and said we
>could patch up there in a half hour or so.

	Hate to rain on your parade, but the speed limit is likely to be on
the Xilinx end. It took about 12 hours on my DSL line to patch the 11.3 web 
edition (and then it didn't support the Cyclone 2 on the board I have and I 
had to downgrade :-)).
	The upside is that the web edition of ISE is free (although it doesn't
support some of the larger FPGAs which may be an issue in your case as I 
haven't looked at the board you have) so you don't need to worry about the 
licence running out in 30 days if you download the web edition (and your DVD
may have a copy of the web edition on it and may be a more reasonable place
to start). 

>I'll spend some time studying so I can get to the point of asking
>questions about VHDL.

	The folks in here are both knowlegable and helpful (I'm learning a lot
just reading the posts flow by :-)). You may also want to have a look at
www.fpga4fun.com as they have a variety of beginner level projects and 
documents that I find helpful (the cyclone2 is on one of their dragon boards). 

>Rick

Peter Van Epp