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Comp.Arch.FPGA | Virtex-5 with DDR3 running @ 50Mhz
There are 5 messages in this thread.
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Virtex-5 with DDR3 running @ 50Mhz - lonny - 2010-01-13 18:39:00
using Virtex-5 with DLL disabled and the DDR3 running at 50Mhz, do you needthe terminations at the end of the fly-by routing of the address bus? --------------------------------------- This message was sent using the comp.arch.fpga web interface onhttp://www.FPGARelated.com
Re: Virtex-5 with DDR3 running @ 50Mhz - =?ISO-8859-2?Q?Adam_G=F3rski?= - 2010-01-14 05:52:00
lonny pisze: > using Virtex-5 with DLL disabled and the DDR3 running at 50Mhz, do you need > the terminations > at the end of the fly-by routing of the address bus? > > > > --------------------------------------- > This message was sent using the comp.arch.fpga web interface on > http://www.FPGARelated.com DDR3 has got not only max frequency. See min frequency or min tck. Adam
Re: Virtex-5 with DDR3 running @ 50Mhz - Nico Coesel - 2010-01-14 13:20:00
=?ISO-8859-2?Q?Adam_G=F3rski?= <t...@malpawp.pl> wrote: >lonny pisze: >> using Virtex-5 with DLL disabled and the DDR3 running at 50Mhz, do you need >> the terminations >> at the end of the fly-by routing of the address bus? Probably not. >> >> >> --------------------------------------- >> This message was sent using the comp.arch.fpga web interface on >> http://www.FPGARelated.com > >DDR3 has got not only max frequency. See min frequency or min tck. AFAIK only the PLL has a minimum frequency. In order to detect and configure the memory you have to run it at a lower frequency which implies DDR3 memory can also be used at (poorly specified) lower frequencies. -- Failure does not prove something is impossible, failure simply indicates you are not using the right tools... nico@nctdevpuntnl (punt=.) --------------------------------------------------------------
Re: Virtex-5 with DDR3 running @ 50Mhz - Sean Durkin - 2010-01-14 13:31:00
Adam Górski wrote: > lonny pisze: >> using Virtex-5 with DLL disabled and the DDR3 running at 50Mhz, do you >> need >> the terminations >> at the end of the fly-by routing of the address bus? > > DDR3 has got not only max frequency. See min frequency or min tck. He has the DLL disabled, which is the only component that actually has the minimum frequency restriction. If you disable the DLL, the phase relationship between input clock and output data strobe and data is not fixed and specified, but at 50MHz that might not be a problem. But the DRAM manufacturers usually don't specify or guarantee anything when you run the chips in that mode, so I've never used it... As to the OP's question: It depends... On your stackup, the length of the routes, the number of chips hanging on the address bus... It's not just the frequency that matters. It would be best to simulate the transmission lines beforehand. HTH, Sean______________________________
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Re: Virtex-5 with DDR3 running @ 50Mhz - =?ISO-8859-2?Q?Adam_G=F3rski?= - 2010-01-15 07:24:00
>>> using Virtex-5 with DLL disabled and the DDR3 running at 50Mhz, do you need >>> the terminations >>> at the end of the fly-by routing of the address bus? >> DDR3 has got not only max frequency. See min frequency or min tck. > > AFAIK only the PLL has a minimum frequency. In order to detect and > configure the memory you have to run it at a lower frequency which > implies DDR3 memory can also be used at (poorly specified) lower > frequencies. > For me if I see tck min in datasheet it means it has min tck. You can't relay on "maybe". Adam______________________________
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