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Comp.Arch.FPGA | using an FPGA to emulate a vintage computer

There are 235 messages in this thread.

You are currently looking at messages 10 to 20.

Re: using an FPGA to emulate a vintage computer - James Dow Allen - 2010-02-06 06:29:00

On Feb 6, 1:19=A0am, Eric Chomko
<pne.cho...@comcast.net> wrote:
> Has anyone created a copy machine of an old system using an FPGA?

It's the answer to a different question of course,
but a National Semiconducter subsidiary once tried to
emulate an IBM 3033 at full speed using Fairchild 100k parts.
... the reason for failure is interesting ...

James Dow Allen



Re: using an FPGA to emulate a vintage computer - Nico Coesel - 2010-02-06 07:35:00

Eric Chomko <p...@comcast.net>
wrote:

>Has anyone created a copy machine of an old system using an FPGA? I
>was wondering if it would be possible to take an entire SWTPC 6800 and
>compile the schematics and have it run on an FPGA board.? Wouldn't
>even have to be the latest Xylinx product, I suspect.

Many people already did that.

http://www.hat.hi-ho.ne.jp/tujikawa/esepld/esemsx2/

-- 
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------
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Re: using an FPGA to emulate a vintage computer - Jonathan Bromley - 2010-02-06 08:23:00

On Fri, 05 Feb 2010 16:33:24 -0800, Mike Treseler
wrote:

>http://www.grc.com/pdp-8/pdp-8.htm

Wow, thanks for that wonderful link, and thanks to
the wonderful but certifiably deranged people who
put together all those resources.  I cut my teeth
on PDP8s in various forms; FOCAL was my first 
programming language; a PDP8/a (yes, I know, not
a real classic but a nice Classic nonetheless) was
the first computer whose guts I got to mess with.
That one was mostly 74-TTL, with quite a lot of
small bipolar PROMs for its state machines.
(For the youngsters: "small" here means 256 byte
or thereabouts.  Byte, not kilobyte, please note.)

And I totally agree with all the hagiography on 
that site celebrating the 8's superb economy of
design, in the days when that desperately mattered.
It spilt over into programming too.  OS/8 required
you to write device drivers in only 256 12-bit 
words; I managed to do one of those myself.
DEC got the entire FORTRAN runtime library into 
only 4K of (self-modifying!!) code.

Sorry, I'm rambling.  I'm still on a nostalgia high
after a visit to the fabulous collection of old
computer equipment in the Deutsches Museum in
Munich a couple of weeks ago.  Strangely, though,
they had no DEC equipment at all!
-- 
Jonathan Bromley
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Re: using an FPGA to emulate a vintage computer - Al Kossow - 2010-02-06 12:10:00

On 2/6/10 3:29 AM, James Dow Allen wrote:
> On Feb 6, 1:19 am, Eric Chomko<pne.cho...@comcast.net>  wrote:
>> Has anyone created a copy machine of an old system using an FPGA?
>
> It's the answer to a different question of course,
> but a National Semiconducter subsidiary once tried to
> emulate an IBM 3033 at full speed using Fairchild 100k parts.
> ... the reason for failure is interesting ...
>
> James Dow Allen

I would be interested in what the reason for failure was.
I assume it wasn't the obvious chip-chip delays using commodity
ICs.



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Re: using an FPGA to emulate a vintage computer - Anne & Lynn Wheeler - 2010-02-06 13:15:00

James Dow Allen <j...@yahoo.com>
writes:
> It's the answer to a different question of course,
> but a National Semiconducter subsidiary once tried to
> emulate an IBM 3033 at full speed using Fairchild 100k parts.
> ... the reason for failure is interesting ...

in the early 80s los gatos did custom hardware for chip logic simulation
(LSM ... "losgatos state machine" ... then "logic simulation machine"
for publication) ... dozen plus rack boxes ... ran 50,000 times faster
faster than logic simulation in software on 3033

this mentions putting 4.5 meter dish in back parking lot of los gatos
lab (and on east coast in field near yorkton research).
http://www.garlic.com/~lynn/2010c.html#57 watches

a dish also went into austin ... and austin credits the link and access
to hardware logic simulation (relatively high bandwidth for the period
... for transmission of chip design files) with helping bring in the
RIOS chipset 12 months early ... recent reference to six chipset RIOS
(aka POWER, used in rs/6000).
http://www.garlic.com/~lynn/2010c.html#20 Processes' memory

later hardware logic simulators assumed synchronous clock ... but the
LSM had clock support ... allowed simulation of digital chips with
analog circuits ... (the then) new generation of thin-film disk heads
and chips with non-globally synchronous circuit.

however, the 3033 in bldg. 15 (disk product test lab) was used for air
bearing software simulation (shape for floating disk heads) ... misc.
past posts getting to play disk engineer in bldgs. 14&15
http://www.garlic.com/~lynn/subtopic.html#disk

misc. past posts mentioning LSM
http://www.garlic.com/~lynn/2002d.html#3 Chip Emulators - was How does a chip get
designed?
http://www.garlic.com/~lynn/2002g.html#55 Multics hardware (was Re: "Soul of a New
Machine" Computer?)
http://www.garlic.com/~lynn/2002g.html#77 Pipelining in the past
http://www.garlic.com/~lynn/2002g.html#82 Future architecture
http://www.garlic.com/~lynn/2002j.html#26 LSM, YSE, & EVE
http://www.garlic.com/~lynn/2003.html#31 asynchronous CPUs
http://www.garlic.com/~lynn/2003k.html#3 Ping:  Anne & Lynn Wheeler
http://www.garlic.com/~lynn/2003k.html#14 Ping: Anne & Lynn Wheeler
http://www.garlic.com/~lynn/2003o.html#38 When nerds were nerds
http://www.garlic.com/~lynn/2004j.html#16 US fiscal policy (Was: Bob Bemer, Computer
Pioneer,Father of ASCII,Invento
http://www.garlic.com/~lynn/2004o.html#25 CKD Disks?
http://www.garlic.com/~lynn/2004o.html#65 360 longevity, was RISCs too close to hardware?
http://www.garlic.com/~lynn/2005c.html#6 [Lit.] Buffer overruns
http://www.garlic.com/~lynn/2005d.html#33 Thou shalt have no other gods before the ANSI C
standard
http://www.garlic.com/~lynn/2006q.html#42 Was FORTRAN buggy?
http://www.garlic.com/~lynn/2006r.html#11 Was FORTRAN buggy?
http://www.garlic.com/~lynn/2007f.html#73 Is computer history taught now?
http://www.garlic.com/~lynn/2007h.html#61 Fast and Safe C Strings: User friendly C macros
to Declare and use C Strings
http://www.garlic.com/~lynn/2007l.html#53 Drums: Memory or Peripheral?
http://www.garlic.com/~lynn/2007m.html#58 Is Parallel Programming Just Too Hard?
http://www.garlic.com/~lynn/2007m.html#61 Is Parallel Programming Just Too Hard?
http://www.garlic.com/~lynn/2007n.html#22 What if phone company had developed Internet?
http://www.garlic.com/~lynn/2007o.html#67 1401 simulator for OS/360
http://www.garlic.com/~lynn/2007o.html#68 CA to IBM TCP Conversion
http://www.garlic.com/~lynn/2008c.html#68 Toyota Beats GM in Global Production
http://www.garlic.com/~lynn/2009k.html#75 Disksize history question
http://www.garlic.com/~lynn/2009m.html#63 What happened to computer architecture (and
comp.arch?)

--
42yrs virtualization experience (since Jan68), online at home since Mar1970

Re: using an FPGA to emulate a vintage computer - rickman - 2010-02-06 13:19:00

On Feb 5, 1:51=A0pm, "(see below)"
<yaldni...@blueyonder.co.uk> wrote:
> On 05/02/2010 18:19, in article
> badc12c3-cb2b-4ce9-9543-237d60fc2...@o8g2000vbm.googlegroups.com, "Eric
>
> Chomko" <pne.cho...@comcast.net> wrote:
> > Has anyone created a copy machine of an old system using an FPGA? I
> > was wondering if it would be possible to take an entire SWTPC 6800 and
> > compile the schematics and have it run on an FPGA board.? Wouldn't
> > even have to be the latest Xylinx product, I suspect.
>
> I think such a project would valuable, and perhaps even more valuable if =
it
> aimed to recreate a machine of the "heroic" era -- a 7094, an Atlas, or a
> KDF9, say. Perhaps even a Stretch.
>
> KDF9 had about 20K transistors, a few K logic transformers, and a compara=
ble
> number of diodes; less than 50K devices in total. I imagine this would be
> easily accommodated on a modern FPGA. The big question would be whether t=
o
> go for functional equivalence, or whether to try to replicate the origina=
l
> internal structures.
>
> Documentation would be the main challenge for the latter.
>
> --
> Bill Findlay
> <surname><forename> chez blueyonder.co.uk

Heck, on an iCore 2 you might be able to run that under Spice!  You
could probably even provide a graphical display of any front panel
lights!

Rick
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Re: using an FPGA to emulate a vintage computer - Jecel - 2010-02-06 13:34:00

I try to keep a reasonably updated list of such
projects at

http://www.merlintec.com:8080/hardware/31

-- Jecel

Re: using an FPGA to emulate a vintage computer - glen herrmannsfeldt - 2010-02-06 14:10:00

In comp.arch.fpga Anne & Lynn Wheeler
<l...@garlic.com> wrote:
(snip)
 
> in the early 80s los gatos did custom hardware for chip logic simulation
> (LSM ... "losgatos state machine" ... then "logic simulation
machine"
> for publication) ... dozen plus rack boxes ... ran 50,000 times faster
> faster than logic simulation in software on 3033

I remember when I first started working with computers I had a
book from our library about ECAP, IBM's Electronic Circuit
Analysis Program.  I never saw or used the actual program,
and haven't heard about it since.   I wonder where it went...

-- glen
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Re: using an FPGA to emulate a vintage computer - Anne & Lynn Wheeler - 2010-02-07 11:51:00

glen herrmannsfeldt <g...@ugcs.caltech.edu> writes:
> I remember when I first started working with computers I had a
> book from our library about ECAP, IBM's Electronic Circuit
> Analysis Program.  I never saw or used the actual program,
> and haven't heard about it since.   I wonder where it went...

re:
http://www.garlic.com/~lynn/2010c.html#71 using an FPGA to emulate a vintage computer

no direct knowledge and web search is rather sparse ... a couple IEEE
citations:
http://ieeexplore.ieee.org/Xplore/login.jsp?url=http%3A%2F%2Fieeexplore.ieee.org%2Fiel5%2F
23%2F4335780%2F04335910.pdf%3Farnumber%3D4335910&authDecision=-203
http://ieeexplore.ieee.org/Xplore/login.jsp?url=http%3A%2F%2Fieeexplore.ieee.org%2Fiel5%2F
6%2F5218140%2F05218152.pdf%3Farnumber%3D5218152&authDecision=-203

in the aftermath of the troubles of the early 90s ... there was push to
move to industry standard tools ... part of which involved transfer of
internal tools to chip tool vendors (and some number of the internal
chip tools people spending a lot of time with these vendors ... and then
some number leaving and joining external vendor).

I've mentioned recently porting nearly 60k statement pascal program
(that did circuit layout) to other platforms, as part of such a tool
transfer.
http://www.garlic.com/~lynn/2010b.html#74 Happy DEC-10 Day
http://www.garlic.com/~lynn/2010c.html#29 search engine history, was Happy DEC-10 Day

in the mid-80s ... internally, there was big push to expand a lot of
mainframe manufacturing capacity anticipating the market would double in
size by the early 90s. Not particularly "career enhancing" ... I made
some observation that computer hardware was becoming increasingly
commoditized ... resulting in thinner margins & profits ... which would
at least require significantly cutting the number of related employees
to stay out of the red. misc. past posts mentioning various (non)
"career enhancing":
http://www.garlic.com/~lynn/2007e.html#48 time spent/day on a computer
http://www.garlic.com/~lynn/2007f.html#30 The Perfect Computer - 36 bits?
http://www.garlic.com/~lynn/2007r.html#6 The history of Structure capabilities
http://www.garlic.com/~lynn/2008l.html#23 Memories of ACC, IBM Channels and Mainframe
Internet Devices
http://www.garlic.com/~lynn/2009c.html#54 THE runs in DOS box?
http://www.garlic.com/~lynn/2009p.html#34 big iron mainframe vs. x86 servers
http://www.garlic.com/~lynn/2009r.html#49 "Portable" data centers
http://www.garlic.com/~lynn/2009r.html#50 "Portable" data centers
http://www.garlic.com/~lynn/2009s.html#4 While watching Biography about Bill Gates on CNBC
last Night

-- 
42yrs virtualization experience (since Jan68), online at home since Mar1970
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Re: using an FPGA to emulate a vintage computer - James Dow Allen - 2010-02-07 16:44:00

On Feb 7, 12:10=A0am, Al Kossow
<a...@bitsavers.org> wrote:
> On 2/6/10 3:29 AM, James Dow Allen wrote:
> >  a National Semiconducter subsidiary once tried to
> > emulate an IBM 3033 at full speed using Fairchild 100k parts.
> > ... the reason for failure is interesting ...
> .
> I would be interested in what the reason for failure was.
> I assume it wasn't the obvious chip-chip delays using commodity
> ICs.

I think you mean that chip-chip delays would be too obvious
to be interesting.  :-)

The commodity high-speed ECL chips were almost in the
same ballpark as IBM's chips for speed and density, but
IBM's packaging was better in various ways.  The one
difference I found "interesting" and which seemed to be
a significant factor in the slowdown was that IBM used
smaller circuit boards.  Each signal was therefore
closer to the backplane, so closer to more chips total;
in other words the smaller circuit boards allowed IBM's
wiring to take better advantage, in some sense, of
the 3rd dimension!

I think there were other important factors in that
project's failure, but there's no need to start
any anti-NatSemi flamefest.  :-)

James Dow Allen

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