Pallavi
<pallavi_mp@n_o_s_p_a_m.rediffmail.com> wrote:
 
> I'm implementing this project where I've to generate higher output clk
> frequencies using DCM module. I have used a counter for delay generator,
> for propagation delays(Pls suggest if there is any other method). 

As a logic designer, one of the things you are responsible for is
understanding the timing limitations of the underlying logic.

Today, 300MHz is still pretty fast, but some logic families can
do that.  You do have to keep the logic between registers to a
minimum, though, to keep up.

It would be much easier, for example, to process four bits at
a time at 75MHz than one bit at 300MHz.  You may or may not be
able to do that in your design, but most of the time you can.

-- glen