Hi ASICFriends,

I'm using XILINX ISE WebPack, release 8.2 (due to compatibility issues
with older projects).
Does anyone know how to make some symbol inputs to be "don't care"
inside an ISE schematic ? For example, at some mux inputs ? As we can
do on VHDL or Verilog ?
I expect that such issues would allow the synthesis tools to better
optimize the design.
Nowadays I manually tie every unused input to '0' (GND) or '1' (VCC)
sources and the synthesis tool really reduces and optmize the logic as
expected. However, I choose between '1' or '0' by my own analysis.
Is there a way to name these inputs on the schematic as 'X' or
something ?

Greetings to you all
TUDA Pellini

On Mar 10, 4:23=A0pm, TudaPellini
<elpell...@gmail.com> wrote:
> Hi ASICFriends,
>
> I'm using XILINX ISE WebPack, release 8.2 (due to compatibility issues
> with older projects).
> Does anyone know how to make some symbol inputs to be "don't care"
> inside an ISE schematic ? For example, at some mux inputs ? As we can
> do on VHDL or Verilog ?
> I expect that such issues would allow the synthesis tools to better
> optimize the design.
> Nowadays I manually tie every unused input to '0' (GND) or '1' (VCC)
> sources and the synthesis tool really reduces and optmize the logic as
> expected. However, I choose between '1' or '0' by my own analysis.
> Is there a way to name these inputs on the schematic as 'X' or
> something ?
>
> Greetings to you all
> TUDA Pellini

Two possible solutions:
1) Leave the pins "nc" in your schematic.
2) Build a net (pin) driver that sources an 'X', and connect it.

Be prepared to deal with error messages up to and including a "blue
screen of death".  The schematic support in later versions of ISE is
less than poor.

RK