Hello,

I would like to know if XST v11.5 supports any predefined MACRO's. We areparticularly interested in a MACRO for the version of XST being used.

Thanks in advance,
Vikram.	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com

On Apr 1, 1:45=A0pm, "vragukumar"
<vragukumar@n_o_s_p_a_m.n_o_s_p_a_m.signalogic.com> wrote:
> Hello,
>
> I would like to know if XST v11.5 supports any predefined MACRO's. We are
> particularly interested in a MACRO for the version of XST being used.
>
> Thanks in advance,
> Vikram. =A0 =A0
>
> --------------------------------------- =A0 =A0 =A0 =A0
> Posted throughhttp://www.FPGARelated.com

XST is a VHDL and Verilog synthesizer and will synthesis any HDL that
it is provided.  The term MACRO has its orgins in schematic design.

What are you really looking for?

Ed McGettigan
--
Xilinx Inc.

Ed McGettigan <e...@xilinx.com>
wrote:
(snip)
 
> XST is a VHDL and Verilog synthesizer and will synthesis any HDL that
> it is provided.  The term MACRO has its orgins in schematic design.
 
> What are you really looking for?

It sounds like he is looking for something similar to what
the way the C preprocessor is used in C.  I believe that MACRO
has been used a lot longer than computerized schematic design,
back to the beginnings of assembly programming.

I believe that verilog has something similar to the C preprocessor,
I am not so sure about VHDL.

-- glen

On Apr 1, 3:45=A0pm, glen herrmannsfeldt
<g...@ugcs.caltech.edu> wrote:
> Ed McGettigan <ed.mcgetti...@xilinx.com> wrote:
>
> (snip)
>
> > XST is a VHDL and Verilog synthesizer and will synthesis any HDL that
> > it is provided. =A0The term MACRO has its orgins in schematic design.
> > What are you really looking for?
>
> It sounds like he is looking for something similar to what
> the way the C preprocessor is used in C. =A0I believe that MACRO
> has been used a lot longer than computerized schematic design,
> back to the beginnings of assembly programming.
>
> I believe that verilog has something similar to the C preprocessor,
> I am not so sure about VHDL.
>
> -- glen

I almost struck the comment about schematics in my reply and I
probably should have.  I was thinking that the original poster might
be referring to the old Xilinx LogiBlox schematic macros that would be
automatically expanded  by the Xilinx tools.

Ed McGettigan
--
Xilinx Inc.

On Apr 1, 4:02=A0pm, Ed McGettigan
<ed.mcgetti...@xilinx.com> wrote:
> On Apr 1, 3:45=A0pm, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote:
>
>
>
> > Ed McGettigan <ed.mcgetti...@xilinx.com> wrote:
>
> > (snip)
>
> > > XST is a VHDL and Verilog synthesizer and will synthesis any HDL that
> > > it is provided. =A0The term MACRO has its orgins in schematic design.
> > > What are you really looking for?
>
> > It sounds like he is looking for something similar to what
> > the way the C preprocessor is used in C. =A0I believe that MACRO
> > has been used a lot longer than computerized schematic design,
> > back to the beginnings of assembly programming.
>
> > I believe that verilog has something similar to the C preprocessor,
> > I am not so sure about VHDL.
>
> > -- glen
>
> I almost struck the comment about schematics in my reply and I
> probably should have. =A0I was thinking that the original poster might
> be referring to the old Xilinx LogiBlox schematic macros that would be
> automatically expanded =A0by the Xilinx tools.
>
> Ed McGettigan
> --
> Xilinx Inc.

I think I know what the original poster is asking after...

I have found some things that "just don't" synthesize properly with
ISE-11.  By that I mean that there are NO errors or additional
warnings, but the resulting chip is dead, where it wasn't dead with
version 10.

By having a synthesize-time flag, one could create two different
codes, and "if-def" according to which version of XST is being used.

eg:

`ifdef L.70  // this is 11.5
foo <=3D ~bar;
`else
foo <=3D !bar;
`endif

Then again, I'm only guessing about what the OP was asking after...

RK

All,

Thanks for all the responses, and i apologize for being ambiguous. What weare looking for is a predefined version macro that can be used as shownbelow

  `ifdef ISE_VER_11
    code one way
  `else
    code another way
  `endif

or even better,

  `if ISE_VER >= 8
    ...

Thanks and Regards,
Vikram.

>On Apr 1, 4:02=A0pm, Ed McGettigan <ed.mcgetti...@xilinx.com> wrote:
>> On Apr 1, 3:45=A0pm, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote:
>>
>>
>>
>> > Ed McGettigan <ed.mcgetti...@xilinx.com> wrote:
>>
>> > (snip)
>>
>> > > XST is a VHDL and Verilog synthesizer and will synthesis any HDLthat
>> > > it is provided. =A0The term MACRO has its orgins in schematicdesign.
>> > > What are you really looking for?
>>
>> > It sounds like he is looking for something similar to what
>> > the way the C preprocessor is used in C. =A0I believe that MACRO
>> > has been used a lot longer than computerized schematic design,
>> > back to the beginnings of assembly programming.
>>
>> > I believe that verilog has something similar to the C preprocessor,
>> > I am not so sure about VHDL.
>>
>> > -- glen
>>
>> I almost struck the comment about schematics in my reply and I
>> probably should have. =A0I was thinking that the original poster might
>> be referring to the old Xilinx LogiBlox schematic macros that would be
>> automatically expanded =A0by the Xilinx tools.
>>
>> Ed McGettigan
>> --
>> Xilinx Inc.
>
>I think I know what the original poster is asking after...
>
>I have found some things that "just don't" synthesize properly with
>ISE-11.  By that I mean that there are NO errors or additional
>warnings, but the resulting chip is dead, where it wasn't dead with
>version 10.
>
>By having a synthesize-time flag, one could create two different
>codes, and "if-def" according to which version of XST is being used.
>
>eg:
>
>`ifdef L.70  // this is 11.5
>foo <=3D ~bar;
>`else
>foo <=3D !bar;
>`endif
>
>Then again, I'm only guessing about what the OP was asking after...
>
>RK
>	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com

RK,

>By having a synthesize-time flag, one could create two different
>codes, and "if-def" according to which version of XST is being used.
>
>eg:
>
>`ifdef L.70  // this is 11.5
>foo <=3D ~bar;
>`else
>foo <=3D !bar;
>`endif

Thank you for your response. Your understanding of our requirement iscorrect.
What is L.70 ? Is it something that is predefined in ISE to indicate XSTv11.5 ?

Thanks and Regards,
Vikram.	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com